TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 243

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
NDWE
NDALE
NDR/B
NDCE
NDRE
D15∼D0
NDCLE
3.11.3
3.11.3.1 Accessing NAND Flash Memory
registers. This section explains the operations for accessing the NAND Flash.
the levels of the NDCLE, NDALE, and
Operation Description
NDFMCR0<CE0> = 1
The NDFC accesses data on NAND Flash memory indirectly through its internal
Since no dedicated sequencer is provided for generating commands to the NAND Flash,
NDFMCR0<CLE> = 1
Figure3.11.2 Basic Timing for Accessing NAND Flash
92CF26A-241
NDFMCR0<CLE> = 0
NDFMCR0<ALE> = 1
NDCE
pins must be controlled by software.
TMP92CF26A
ND0FMCR<ALE> = 0
2009-06-25

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