TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 245

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

3.11.4
implement the error correction processing using ECC (Error Correction Code).
NAND Flash memory devices may inherently include error bits. It is therefore necessary to
Figure3.11.4 shows a basic flowchart for ECC control.
ECC Control
Write:
Read:
1.
2.
1.
2.
from ECC generator
Valid data write to
Valid data write to
ECC generator
Write ECC to
NAND Flash
NAND Flash
Data Write
When data is written to the actual NAND Flash memory, the ECC generator in
the NDFC simultaneously generates ECC for the written data.
The ECC is written to the redundant area in the NAND Flash separately from
the valid data.
When data is read from the actual NAND Flash memory, the ECC generator in
the NDFC simultaneously generates ECC for the read data.
The ECC for the written data and the ECC for the read data are compared to
detect and correct error bits.
ECC read
END
Figure3.11.4 Basic Flow of ECC Control
92CF26A-243
Valid data read from
Valid data write to
ECC generator
ECC read from
ECC read from
Is there error ?
NAND Flash
NAND Flash
ECC circuit
Data Read
END
No
Yes
TMP92CF26A
2009-06-25
Error correction
process