TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 265

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

3.11.7
1.
2.
An Example of Accessing NAND Flash of MLC Type (When the valid data is processed
as 518byte)
Initialization
;
; ***** Initialize NDFC *****
;
;
Write
Writing valid data
; ***** Write valid data*****
;
Generating ECC → Reading ECC
; ***** Read ECC *****
;
;
;
;
;
;
Conditions: 16-bit bus, CE1, MLC, 2048 (2112) bytes/page, Reed-Solomon codes
ld
ld
ldw
ldw
ldw
ldw
ldw
ldw
ldw
ldw
ldw
ldw
ldw
ldw
ldw
ldw
ldw
ldw
ldw
(ndfmcr1),0007h ; 16-bit bus, Reed-Solomon ECC, SYSCK-ON
(ndfmcr0),5000h ; SPLW1:0=1, SPHW1:0=1
(ndfmcr0),5008h ; CE1 enable
(ndfmcr0),50A8h ; WE enable, CLE enable
(ndfdtr0),0080h
(ndfmcr0),50C8h ; ALE enable
(ndfdtr0),00xxh
(ndfmcr0),508Dh ; Reset ECC code, ECCE enable
(ndfdtr0),xxxxh
(ndfmcr0),5008h ; ECC circuit disable
(ndfmcr0),50A8h ; WE enable, CLE enable
(ndfdtr0),0080h
(ndfmcr0),50C8h ; ALE enable
(ndfdtr0),00xxh
xxxx,(ndeccrd0)
Read:
xxxx,(ndeccrd1)
Read:
xxxx,(ndeccrd2)
Read:
xxxx,(ndeccrd3)
Read:
xxxx,(ndeccrd4)
Read:
92CF26A-263
D79-64
D63-48
D47-32
D31-16
D15-0
; serial input command
; Address write ( 4 or 5 times)
; Data write (259-times/:518byte)
; serial input command
; Address write ( 4 or 5 times)
; Read ECC from internal circuit
; Read ECC from internal circuit
; Read ECC from internal circuit
; Read ECC from internal circuit
; Read ECC from internal circuit
(256-times/512byte)
TMP92CF26A
2009-06-25