TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 280

no-image

TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
TA01MOD
(1104H)
Bit symbol
Read/Write
Reset State
Function
TMRA0 input clock
TMRA1 input clock
PWM cycle selection
TMRA01 operation mode selection
Operation mode
00: 8-bit timer mode
01: 16-bit timer mode
10: 8-bit PPG mode
11: 8-bit PWM mode
TA01M1
<TA01MA1:0>
<TA0CLK1:0>
<TA1CLK1:0>
7
<PWM01:00>
0
TA01M0
6
0
Figure 3.12.8 Register for TMRA
PWM cycle
00: Reserved
01: 2
10: 2
11: 2
TMRA01 Mode Register
PWM01
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
5
0
6
7
8
92CF26A-278
8 timer × 2ch
16-bit timer
8-bit PPG
8-bit PWM (TMRA0),
8-bit timer (TMRA1)
TA0IN (External input)
φT1
φT4
φT16
Comparator output from
TMRA0
φT1
φT16
φT256
Reserved
2
2
2
TA01MOD<TA01M1:0>≠01
6
7
8
× Source clock
× Source clock
× Source clock
PWM00
4
0
R/W
Source clock for TMRA1
00: TA0TRG
01: φT1
10: φT16
11: φT256
TA1CLK1
3
0
TA01MOD<TA01M1:0>=01
TA1CLK0
Overflow output from
(16-bit timer mode)
2
0
TMRA0
Source clock for TMRA0
00: TA0IN pin
01: φT1
10: φT4
11: φT16
TA0CLK1
1
0
TA0CLK0
TMP92CF26A
0
0
2009-06-25

Related parts for TMP92xy26AXBG