TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 282

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

TA45MOD
(1114H)
Bit symbol
Read/Write
Reset State
Function
TMRA4 input clock
TMRA5 input clock
PWM cycle selection
TMRA45 operation mode selection
Operation mode
00: 8-bit timer mode
01: 16-bit timer mode
10: 8-bit PPG mode
11: 8-bit PWM mode
TA45M1
<TA45MA1:0>
<TA4CLK1:0>
<TA5CLK1:0>
<PWM41:40>
7
0
TA45M0
6
0
Figure 3.12.10 Register for TMRA
PWM cycle
00: Reserved
01: 2
10: 2
11: 2
TMRA45 Mode Register
PWM41
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
5
0
6
7
8
92CF26A-280
low-frequency clock(fs)
φT1
φT4
φT16
Comparator output from
TMRA4
φT1
φT16
φT256
Reserved
2
2
2
8 timer × 2ch
16-bit timer
8-bit PPG
8-bit PWM (TMRA4),
8-bit timer (TMRA5)
TA45MOD<TA45M1:0>≠01 TA45MOD<TA45M1:0>=01
6
7
8
× Source clock
× Source clock
× Source clock
PWM40
4
0
R/W
TMRA5 clock for TMRA5
00: TA4TRG
01: φT1
10: φT16
11: φT256
TA5CLK1
3
0
TA5CLK0
Overflow output from
(16-bit timer mode)
2
0
TMRA4
TMRA4 clock for TMRA4
00: low-frequency clock
01: φT1
10: φT4
11: φT16
TA4CLK1
1
0
TA4CLK0
TMP92CF26A
0
0
2009-06-25