TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 303

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

The timer registers are write-only registers and thus cannot be read.
(1188H and 1189H) allocated to them. If <TB0RDE> = “0”, the value is written to both
the timer register and the register buffer 10. If <TB0RDE> = “1”, the value is written to
the register buffer 10 only.
TB0RG0H/L and the register buffer 10 both have the same memory addresses
The addresses of the timer registers are as follows:
TMRB0
TMRB1
Upper 8 bits
(TB0RG0H)
Upper 8 bits
(TB1RG0H)
1189H
1199H
TB1RG0 H/L
TB0RG0H/L
Lower 8 bits
Lower 8 bits
(TB0RG0L)
(TB1RG0L)
1188H
1198H
92CF26A-301
Upper 8 bits
Upper 8 bits
(TB0RG1H)
(TB1RG1H)
118BH
119BH
TB0RG1 H/L
TB1RG1 H/L
Lower 8 bits
Lower 8 bits
(TB0RG1L)
(TB1RG1L)
118AH
119AH
TMP92CF26A
2009-06-25