TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 316

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

Example: To output 2ms one-shot pulse with 3ms delay to the external trigger pulse to TB0IN0pin
Main setting
Setting in INTTB01 routine
X: Don't care, −: No change
TB0MOD
TB0FFCR
PPFC
INTE56
INTETB0
TB0RUN
Setting in INT6 routine
TB0RG0H/L
TB0RG1H/L
TB0FFCR
INTETB0
TB0FFCR
INTETB0
value is loaded into capture register (TB0CP0H/L), and set the TB0CP0H/L value (c)
plus the one –shot pulse width (p) to TB0RG1H/L when the interrupt INT6 occurs. The
TB0FF0 inversion should be enabled when the up counter (UC10) value matched
TB0RG1H/L, and disabled when generating the interrupt INTTB01.
When delay time is unnecessary, invert timer flip-flop TB0FF0 when the up counter
← X
← X
←
← X
← X
←
← X
← X
← TB0CP0H/L + 3ms/φT1
← TB0RG0H/L + 2ms/φT1
← X
← X
–
–
X
X
1
1
0
0
X
1
X
0
1
0
–
0
0
X
–
0
–
0
0
0
–
0
0
X
–
0
–
0
X
X
X
X
1
0
–
–
1
0
*Clock state
0
0
–
–
0
1
1
0
0
0
92CF26A-314
X
0
1
–
–
0
–
0
–
0
X
1
0
–
0
1
–
0
–
0
System clock :
Prescaler clock :
Select PP6 as TB0OUT0 pin (port setting)
Enable INT6
Disable INTTB00, INTTB01
Start TMRB0
matches TB0RG0H/L or TB0RG1H/L
Enable INTTB01
matches TB0RG0H/L or TB0RG1H/L
Disable INTTB01
Free-running
Count with φT1
Load to TB0CP0H/L at the rising edge of TB0IN0
Clear TB0FF0 to “0”
Disable TB0FF0 inversion
Enable TB0FF0 inversion when the up counter value
Disable TB0FF0 inversion when the up counter value
f
f
SYS
SYS
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TMP92CF26A
2009-06-25