TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 317

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

Loading to TB0CP0H/L
Loading to TB0CP1H/L
Count clock
(TB0IN0 pin input)
TA1FF
INTTA0/INTTA1
Enable inversioncaused by
loading to TB0CP0H/L
Count clock
(Prescaler output clock )
TB0IN0 iput
(External trigger pulse)
Match with TB0RG1H/L
Timer output pin TB0OUT0
Note: The frequency in this examole is calculated with 50% duty.
2.
input through the TB0IN0 pin, and its frequency is measured by the 8 bit timers
TMRA01 and the 16 bit timer/event counter (TMRB0).
TB0MOD<TB0CPM1:0>=”11”. The value of the up counter is loaded into the
capture register TB0CP0H/L at the rising edge of the timer flip-flop TA1FF of 8bit
timers (TMRA01), and TB0CP1H/L at its falling edge.
TB0CP0H/L and TB0CP1H/L when the interrupt (INTTA0 or INTTA1) is
generated by either 8 bit timer.
to 0.5[s] and the difference between TB0CP0H/L and TB0CP1H/L is 100, the
frequency will be 100/0.5[s] =200[Hz].
Frequency measurement
The frequency of the external clock can be measured in this mode. The clock is
The TB0IN0 pin input should be selected for the input clock of TMRB0. Set to
The frequency is calculated by the difference between the loaded values in
For example, if the value for the level 1 width of TA1FF of the 8 bit timer is set
Figure 3.13.13 One-shot Pulse Output (without delay)
Figure 3.13.14 Frequency Measurement
C1
C1
c
Load into capture register 0 (TB0CP0H/L)
Inversion enable
INT6 occured
Pulse width
(p)
92CF26A-315
c + p
C2
C2
INTTB01 occured
Disable inversion caused by loading into
TB0CP1H/L
Load into capture register 1 (TB0CP1H/L)
C1
TMP92CF26A
2009-06-25
C2