TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 32

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
3.3.5
Note: This function (EMCCR0<DRVODCH>= “0”) is available when f
Noise reduction circuits
(1) Reduced drivability for high-frequency oscillator circuit
(1) Reduced drivability for high-frequency oscillator circuit
(2) Reduced drivability for low-frequency oscillator circuit
(3) Single drive for high-frequency oscillator circuit
(4) Runaway prevention using SFR protection register
Noise reduction circuits are built in, allowing implementation of the following features.
These are set in EMCCR0 to EMCCR2 registers.
register. At reset, <DRVOSCH> is initialized to “1” and the oscillator starts oscillation
by normal-drivability when the power-supply is on.
(Purpose)
Reduces noise and power for oscillator when a resonator is used.
(Clock diagram)
(Setting method)
The drivability of the oscillator is reduced by writing”0” to EMCCR0<DRVOSCH>
Resonator
C1
C2
X1 pin
X2 pin
92CF26A-30
OSCH
f
OSCH
Enable oscillation
EMCCR0<DRVOSCH>
= 6 to 10MHz.
TMP92CF26A
2009-06-25

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