TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 335

no-image

TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
3.14.4
Output extension
Output extension
TMP92CF26A
TMP92CF26A
Operation in each mode
(1) Mode 0 (I/O Interface Mode)
data to or receiving data from an external shift register.
SCLK input mode to input external synchronous clock SCLK.
SCLK
SCLK
TXD
TXD
Port
Port
This mode allows an increase in the number of I/O pins available for transmitting
This mode includes the SCLK output mode to output synchronous clock SCLK and
Figure 3.14.12 Example of SCLK Input Mode Connection
Figure 3.14.11 SCLK Output Mode connection example
TC74HC595 or equivalent
TC74HC595 or equivalent
SI
SCK
RCK
SI
SCK
RCK
External clock
Shift register
Shift register
92CF26A-333
G
G
C
D
H
C
D
H
A
B
E
A
B
E
F
F
Input extension
Input extension
TMP92CF26A
TMP92CF26A
SCLK
SCLK
RXD
RXD
Port
Port
TC74HC165 or equivalent
TC74HC165 or equivalent
QH
CLOCK
S/
QH
CLOCK
S/
External clock
Shift register
L
L
Shift register
TMP92CF26A
G
G
C
D
H
C
D
H
A
B
E
A
B
E
F
F
2009-06-25

Related parts for TMP92xy26AXBG