TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 349

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
SBICR0
(1247H)
A read-
modify-write
operation
cannot be
performed
3.15.4
Bit symbol
Read/Write
Reset State
Function
<SBIEN> : When using SBI, <SBIEN> should be set “1” (SBI operation enable) before setting each register of SBI
the serial bus interface (SBI) in the I
I
2
C Bus Mode Control Register
The following registers are used to control and monitor the operation status when using
SBI
operation
0 : disable
1 : enable
SBIEN
module.
R/W
7
0
Figure 3.15.3 Registers for the I
6
0
Serial Bus Interface Control Register 0
5
0
92CF26A-347
2
C bus mode.
4
0
Always read “0”.
2
3
R
0
C bus mode
2
0
1
0
TMP92CF26A
0
0
2009-06-25

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