TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 374

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
USBCR1
(07F8H)
bit Symbol
Read/Write
Reset State
Function
3.16.2.2 USBCR1 Register
TRNS_USE
This register is used to set USB clock enables, transceiver enable etc.
R/W
7
TRNS_USE (Bit7)
WAKEUP
SPEED
USBCLKE
0
Always set to “1” on the application using USB.
When
Current_Config<REMOTE WAKEUP>.
If <REMOTE WAKEUP> = “1” (meaning SUSPEND-status), write “1”, and “0” to
<WAKEUP>. This will initiate the remote-wakeup function.
If <REMOTE WAKEUP> = “0” or EP0, 1, 2, 3_STATUS<SUSPEND> = “0”, do
not write “1” to <WAKEUP>.
This bit selects USB speed.
Always set to “1”.
This bit controls supply of USB clock.
The USB clock (“f
is started, write “1” to <USBCLKE> after confirming PLL lock up is terminated.
Also, write “0” to <USBCLKE> before stopping the PLL.
0: Disable USB transceiver
1: Enable USB transceiver
0: −
1: Start remote-wakeup function
1: Full speed (12 MHz)
0: Reserved
0: Disable USB clock
1: Enable USB clock
WAKEUP
R/W
the
6
0
(Bit6)
(Bit1)
(Bit0)
remote-wakeup
USB
92CF26A-372
5
”: 48MHz) is generated by an internal PLL. When the USB
4
function
3
is
2
needed,
SPEED
R/W
1
1
TMP92CF26A
first
2009-06-25
USBCLKE
R/W
0
0
check

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