TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 379

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

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INT_STASN (Bit4)
INT_EPxN (Bit3, 2, 1)
This is the flag register for INT_STASN (change host status stage - interrupt).
This is set to “1” when the USB host changes to status stage at the Control read
transfer. This interrupt is needed if data length is less than wLength (specified
by the host).
This is the flag register for INT_EPxN (NAK acknowledge to the USB host -
interrupt).
This is set to “1” when the Endpoint1, 2 and 3 transmit NAK.
92CF26A-377
TMP92CF26A
2009-06-25