TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 44

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

3.4
3.4.1
Name
Boot ROM
kinds of downloading methods.
(a)
(b)
The TMP92CF26A contains boot ROM for downloading a user program, and supports two
operation mode is selected according to the AM1 and AM0 pin levels when
asserted.
(1) MULTI mode:
(2) BOOT mode:
Operation Modes
RESET
The TMP92CF26A has two operation modes: MULTI mode and BOOT mode. The
Mode Setting Pins
Priority
1
2
AM1
0
1
1
0
PC (USB_HOST)
AM0
PC (UART)
Source
Table 3.4.2 Outline of Boot Operation
1
0
1
0
After reset, the CPU fetches instructions from external memory and
executes them.
After reset, the CPU fetches instructions from internal boot ROM
and executes them. The boot ROM loads a user program into internal
RAM from USB, or via UART, and then branches to the internal
RAM. In this way the user program starts boot operation. Table 3.4.2
shows an outline of boot operation.
Table 3.4.1 Operation Modes
MULTI
TEST (Setting prohibited)
BOOT (Start from internal boot ROM)
TEST (Setting prohibited)
92CF26A-42
Loading
UART
USB
I/F
Operation Mode
Start from external 16-bit bus memory
Destination
Internal RAM
Operation after
Branch to internal
Loading
RAM
TMP92CF26A
2009-06-25
RESET
is