TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 445

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

Receive OUT token
Confirm Status
Receiving data
Not receive SOF
Confirm DATA PID
• Error
• Receive receiving data
• Error
• PID
• Time out
Confirming STATUS register (status)
Confirm Token packet
• PID
• Address
• Endpoint
• Transfer mode
• Error
Not renew frame number
Loss data
OK
OK
OK
Figure 3.16.12 Control Flow in UDC (Isochronous transfer type (Receiving))
IDLE
IDLE
CRC Error
Frame number unknown
Set LOST to FRAME register
Receive SOF
without transmitting data
Shift FIFO BANK
every receive SOF
Receive SOF
Assert SOF
Error transaction
Error, receiving data more than payload.
Renew frame number
Set STATUS to RX_ERR
NG
Error, time out exept data PID
OK
92CF26A-443
Invalid
Clear X Condition (A)
Set FULL to STATUS
BANK B transaction
BANK A transaction
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•
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Set data size received preceding frame to
DATASIZE register in BANK A
Set BANK A bit in DATASET register
Clear BANK B bit in DATASET register
Set STATUS to DATAIN
(But if error generates, set RX_ERR)
Set data size received preceding frame to
DATASIZE register in BANK B
Set BANK B bit in DATASET register
Clear BANK A bit in DATASET register
Set STATUS to DATAIN
(But if error generates, set RX_ERR)
TMP92CF26A
2009-06-25