TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 480

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

3.16.11 Notice and Restrictions
1.
2.
When using the USB device controller in the TMP92CF26A, a crystal oscillator is
recommended (USB standard ≤ 10 MHz±2500ppm). In this case, a maximum of 3
stages of external hub can be due to the precision of this USB device controller and the
internal clock. If USB compliance (USB logo) is needed, the 5 stages connection is
needed for external hub. And it is needed that input 48MHz clock from X1USB pin
(USB standard ≤ ±2500ppm.)
Precaution for using the USB dual packet mode in the TMP92CF26A
In the dual packet mode, each FIFO is divided into two independent packets (A and
B) to be controlled alternately by hardware.
When reading data from a receive FIFO, it is necessary to check the state of the two
packets to determine which packet should be processed first. At this time, the
following precaution is required.
The EPx_SIZE register that indicates the presence of valid data is provided
separately for packets A and B. The CPU is required to check the respective
PKT_ACTIVE bits to determine which packet was accessed first and then to know the
number of data in this packet. The packet with its PKT_ACTIVE bit set to “1” is the
packet which was received first.
In determining whether only packet A is active, only packet B is active, or both
packets A and B are active, if the respective PKT_ACTIVE bits are read sequentially,
the state of each bit may change between each read. If this happens, the packets may
not be processed in proper order.
Therefore, the PKT_ACTIVE bit information in the EPx_SIZE register should be
captured and saved in another location such as RAM by using an interrupt request.
Then, use this saved information to perform branch processing.
92CF26A-478
TMP92CF26A
2009-06-25