TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 482

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

INTSPI
3.17.1
f
SYS
Note 1: The SPCLK, SPCS , SPDO and SPDI pins are configured as input ports (Ports PR3, PR2, PR1 and PR0)
Note 2: Any one of general inputs and interrupt should be used as the WP (Write Protect) and CD (Card Detect)
16 bits
16 bits
16 bits
16 bits
Figure 3.17.1 shows a block diagram of the SPIC and its connections with a SD card.
16 bits
16 bits
upon reset.
Thus, these pins require pull-up resisters to fix their voltage levels. The pull-up resistor values should be
adjusted under real-world conditions.
inputs, respectively.
Block Diagram
Baud Rate
Generator
SPIC (SPI Controller)
Figure 3.17.1 Block Diagram and Connection Example
92CF26A-480
SPCLK
SPCS
SPDO
SPDI
INTn
Port
100 kΩ
100 kΩ
100 kΩ
100 kΩ
DO
SCLK
CS
DI
WP (Write Protect)
CD (Card Detect)
SD Card
TMP92CF26A
2009-06-25