TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 51

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

3.4.4
Note: When USB is not used, add a pull-up or pull-down resistor to the D+ and D- pins to prevent flow-through
(1) Connection example
(2) UART interface specifications
Downloading a User Program via UART
current.
UART (using a 16-bit NOR Flash memory device as program memory).
PC must also be set up with the same conditions.
3.4.8.
Figure 3.4.4 shows an example of connections for downloading a user program via
SIO channel 0 is used for downloading a user program.
The UART communication format in BOOT mode is shown below. Before booting, the
Although the default baud rate is 9600 bps, this can be changed as shown in Table
PC
Serial transfer mode:
Data length
Parity bit
STOP bit
Handshake
Baud rate (default)
Figure 3.4.4 UART Connection Example
Shifter
Level
UART 3 pins
TXD
RXD
RTS
92CF26A-49
TXD0 P90 (OUT)
RXD0, P91 (IN)
AM0
AM1
: UART (asynchronous) mode, full-duplex
: 8 bits
: None
: 1 bit
: None
: 9600 bps
TMP92CF26A
A1 to 20
PJ2,
D+ D-
D0 to D15
P82,
P70,
SRWR
CS
RD
2
D0 toD15
CE
OE
WE
TMP92CF26A
Flash Memory
A0 toA19
2009-06-25
NOR