TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 585

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
3.20.5
(1) Touch Detection Procedure
Flow chart for TSI
Execute the Main Routine
The following pages explain each circuit condition (a), (b) and (c) in the flow chart above:
Main Routine:
TSICR0←98H
TSICR1←XXH (voluntary)
Figure 3.20.6 Flow chart for TSI
92CF26A-583
(a)
(2) X/Y Position
Yes
Measuring Procedure
<X position measurement>
・TSICR0←C5H
・AN3 AD conversion
・Store the AD conversion result
<Y position measurement>
・TSICR0←CAH
・AN2 AD conversion
・Store the AD conversion result
Execute the processes by using
Return to the Main Routine
X/Y-coordinate position
INT4 Routine:
TSICR0<PTST> = 1?
Still touched?
information
No
TMP92CF26A
2009-06-25
(b)
(c)

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