TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 605

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
Low-speed
clock
[Alarm Generator]
3.22.1
MELALMC<FC1:0>
[Melody Generator]
Block Diagram
MELFH
<MELON>
Stop and Clear
4096 Hz
15bit conter (UC1)
Alarm wave form
Internal data bus
ALM register
8bit counter
generator
(UC2)
Figure 3.22.1MLD Block Diagram
MELFH, MELFL register
12bit counter (UC0)
Comparator (CP0)
Internal data bus
92CF26A-603
Reset
detectior
Edge
Clear
MELALMC
<ALMINV>
Invert
ALMINT
<IALM4E:0E>
Invert
MELOUT
Reset
F/F
ALMOUT
MELOUT
INTALM4 (1 Hz)
INTALM0 (8192Hz)
INTALM1 (512 Hz)
INTALM2 (64 Hz)
INTALM3 (2 Hz)
<MELALM>
MELALMC
Selector
TMP92CF26A
2009-06-25
INTALM
MLDALM pin

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