TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 624

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
3.23.2.4 AD Conversion Modes and AD Conversion-End Interrupts
(1)
started, ADMOD0<BUSY> is set to “1.” When a specified AD conversion ends, the
Normal AD conversion end interrupt (INTAD) is generated, which sets “1” in
ADMOD0<EOS> is set “1”, that shows the end of the AD conversion sequence.
conversion, selection is available by setting ADMOD1<REPEAT and SCAN>. As for
top-priority AD conversion, only single conversion mode by channel-fix mode is
available.
a. Channel-fix single conversion mode
b. Channel-scan single conversion mode
c. Channel-fix repeat conversion mode
a. Channel-fix single conversion mode
b. Channel-scan single conversion mode
c. Channel-fix repeat conversion mode
d. Channel-scan repeat conversion mode
Normal AD conversion
To select operation modes, use ADMOD1<REPEAT, SCAN>. After AD conversion is
For AD conversion, the following four operation modes are provided: For normal AD
conversion mode.
conversion ends, ADMOD0<EOS> is set to “1,” generating Normal AD conversion
End an INTAD interrupt request. <EOS> is cleared to “0” only by being read.
conversion mode.
After scan conversion ends, ADMOD0<EOS> is set to “1,” generating Normal AD
conversion End interrupt request. <EOS> is cleared to “0” only by being read.
conversion mode.
conversion ends, ADMOD0<EOS> is set to “1.” The timing of Normal AD
conversion End INTAD interrupt request generation can be selected by setting
ADMOD1 <ITM>. The timing of <EOS> being set is also liked to the interrupt
timing.
conversion ends. In this case, conversion results are always stored into the storage
register of ADREGxH/L. At the point of storage, <EOS> is set to 1.
conversions end. In this case, conversion results are stored into the storage
registers of ADREG0H/L to ADREG3H/L one after another. After stored into
ADREG3, <EOS> is set to “1,” restarting storage from ADREG0. ADMOD0<EOS>
is set to “1” after a forth conversion result is stored. <EOS> is cleared to “0” only
by being read.
Setting ADMOD1<REPEAT, SCAN> to “00” selects the channel-fix single
This mode performs a conversion only one time at one channel selected. After
Setting ADMOD1<REPEAT, SCAN> to “01” selects the channel-scan single
This mode performs a conversion only one time at each scan channel selected.
Setting ADMOD1<REPEAT, SCAN> to “10” selects the channel-fix repeat
This mode performs a conversion at one channel selected repeatedly. After
ADMOD0<EOS> is cleared to “0” only by being read.
Setting <ITM> to “0” generates an interrupt request each time an AD
Setting <ITM> to “1” generates an interrupt request each time four AD
92CF26A-622
TMP92CF26A
2009-06-25

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