TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 661

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
4.3
AC measuring condition
• Data_bus, Address_bus, various function control signal capacitance C
No.
14-1
14-2
4.3.1
5-1
5-2
6-1
6-2
7-1
7-2
10 A0 ~ A23 valid → D0 ~ D15 hold
11
12
13
15
1 OSC period (X1/X2)
2 System clock period ( = T)
3 SDCLK low width
4 SDCLK high width
8 A0 ~ A23 valid →
9
A0 ~ A23 valid
A0 ~ A23 valid
Data byte control access time for SRAM
at 0wait
Data byte control access time for SRAM
AC Characteristics
otherwise noted.
RD
RD
RD
RD
RD
RD
RD
WAIT
WAIT
at 4waits/6waits
The Following all AC regulation is the measurement result in following condition, if unless
Note: In table, “Variable” shows the regulation at DVCC3A=3.0V∼3.6V, DVCC1A=DVCC1B=DVCC1C=1.4∼1.6V.
Note: The operation guarantee temperature: 80MHz: Ta = 0 to 50°C, less than 60MHz: Ta = 0 to 70°C
falling → D0 ~ D15 input at 0 waits
falling
low width at 0 waits
low width at 4 waits/6waits
falling → SDCLK rising
rising → D0 ~ D15 hold
high width
AC measuring condition
Read cycle
→ D0 ~ D15 input at 4 waits/6 waits
Basic Bus Cycle
→ D0 ~ D15 input at 4 waits/6waits
setup time
hold time
system clock period [ns].
Clock of top column in above table shows system clock frequency, and “T” shows
Output level: High = 0.7 × DVCC3A, Low = 0.3 × DVCC3A
Input level: High = 0.9 × DVCC3A, Low = 0.1 × DVCC3A
→ D0 ~ D15 input at 0 waits
Parameter
RD
falling
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
SBA4
SBA6
OSC
CYC
t
t
t
RD4
RD6
t
RR4
RR6
t
t
t
t
SBA
RRH
t
AD4
AD6
t
t
92CF26A-659
CL
CH
AD
RD
RR
AR
RK
HA
HR
TK
KT
1.5T − 10
5.5T − 10
7.5T − 10
0.5T − 3
0.5T − 3
0.5T − 5
0.5T − 5
0.5T − 5
Min
12.5
100
20
0
0
2
Variable
2.0T − 18.0
6.0T − 18.0
1.5T − 18.0
5.5T − 18.0
7.5T − 18.0
1.5T − 18.0
5.5T − 18.0
7.5T − 18.0
8.0T - 18.0
166.6
Max
2666
80 MHz 60 MHz Unit
L
50.75
75.75
58.75
83.75
50.75
75.75
12.5
3.25
3.25
0.75
8.75
1.25
1.25
0.75
1.25
= 50 pF
57
82
20
7
0
0
2
106.5
114.5
107.0
16.6
15.3
73.6
14.9
81.3
73.6
115
5.3
5.3
3.3
3.3
3.3
82
20
7
0
0
2
7
TMP92CF26A
ns
2009-06-25

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