TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 678

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
AC measuring condition
• I2SCKO, I2SDO and I2SWS pins C
I2SCKO clock period
I2SCKO high width
I2SCKO low width
I2SDO, I2SWS setup time
I2SDO, I2SWS hold time
4.3.10
I2SCKO
I2SDO
I2SWS
Parameter
Note: The Maximum operation frequency of I2SCKO in I
I
2
S Timing
10MHz.
t
HD
Symbol
t
t
t
t
t
t
CR
HB
SD
HD
LB
LB
t
SD
t
CR
L
= 30 pF
0.5 t
0.5 t
0.5 t
t
0.5 t
HB
t
HD
Min
CR
CR
CR
t
CR
IC
92CF26A-676
− 15
− 15
− 15
− 8
Variable
2
S circuit is 10MHz. Don’t set I2SCKO to value more than
Max
80 MHz 60 MHz Unit
100
35
35
35
42
100
35
35
35
42
ns
TMP92CF26A
2009-06-25

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