TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 680

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
4.4
Analog reference voltage ( + )
Analog reference voltage ( − )
AD converter power supply
voltage
AD converter ground
Analog input voltage
Analog current for analog
reference voltage
Total error
(Quantize error of ± 0.5 LSB is
included)
AD Conversion Characteristics
Parameter
Note1: 1 LSB = (VREFH − VREFL)/1024[V]
Note2: Minimum frequency for operation
Note3: The power supply current from AVCC pin is included in the power supply current of V
Minimum clock for AD converter operate is 3MHz. (Clock frequency that is seleted by Clock gear ≥ f
3MHz)
Symbol
IREFOFF
IREFON
VREFH
VREFL
AVCC
AVSS
AVIN
E
T
Conversion speed at 12 μ s
<VREFON> = “1”
<VREFON> = “0”
92CF26A-678
Condition
DVCC3A/3B
AVCC − 0.2
VREFL
DVSS
DVSS
Min
DVCC3A/3B
AVCC
DVSS
DVSS
Typ.
0.38
± 2.0
1
CC
pin (I
DVCC3A/3B
DVSS + 0.2
VREFH
AVCC
DVSS
TMP92CF26A
Max
CC
0.45
± 4.0
5
).
2009-06-25
SYS
Unit
LSB
mA
μ A
V
=

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