TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 682

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

5.
Table of Special function registers (SFRs)
space from 000000H to 001FF0H.
The SFRs include the I/O ports and peripheral control registers allocated to the 8-Kbyte address
(1) I/O Port
(2) Interrupt control
(3) Memory controller
(4) TSI(Touch screen I/F)
(5) SDRAM controller
(6) LCD controller
(7) PMC
(8) USB controller
(9) SPI controller
(10) MMU
(11) NAND-Flash controller
(12) DMA controller
Table layout
Read/Write
R/W:
R:
W:
W*:
Prohibit RMW:
R/W*:
Symbol
Example: When setting bit0 only of the register PxCR, the instruction “SET 0, (PxCR)” cannot be used. The LD
Note: “Prohibit RMW” in the table means that you cannot use RMW instructions on these register.
Name
(transfer) instruction must be used to write all eight bits.
Both read and write are possible.
Only read is possible.
Only write is possible.
Both read and write are possible (when this bit is read as1)
Read modify write instructions are prohibited. (The EX, ADD, ADC, BUS,
SBC, INC, DEC, AND, OR, XOR, STCF, RES, SET, CHG, TSET, RLC,
RRC, RL, RR, SLA, SRA, SLL, SRL, RLD and RRD instruction are read
modify write instructions.)
Read modify write is prohibited when controlling the pull-up resistor.
Address
92CF26A-680
7
6
(13) Clock gear, PLL
(14) 8-bit timer
(15) 16-bit timer
(16) SIO
(17) SBI
(18) AD converter
(19) Watchdog timer
(20)RTC(Real time clock)
(21)MLD(Melody/alarm generator)
(22)I
(23) MAC
2
S
1
0
Bit Symbol
Initial value System Reset State
Initial value HOT Reset State
Remarks
Read/Write
TMP92CF26A
2009-06-25