TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 697

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

Symbol
P1CR
P6CR
P7CR
P1FC
P4FC
P5FC
P6FC
P7FC
(1) I/O ports (3/11)
PORT1
control
register
PORT1
function
register
PORT4
function
register
PORT5
function
register
PORT6
control
register
PORT6
function
register
PORT7
control
register
PORT7
function
register
Name
Address
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
0006H
0007H
0013H
0017H
001AH
001BH
001EH
001FH
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
P17C
P67C
P47F
P57F
P67F
0/1
0/1
0/1
7
−
−
−
−
−
0
0
0: Input port,
1:Output port
0: Port
1: WAIT
WAIT
P76C
P76F
P16C
P66C
P46F
P56F
P66F
0/1
0/1
0/1
0
−
0
−
6
−
−
−
−
−
0
0
92CF26A-695
0: Input port,
1: Output
0: Port
1:NDR/
NDR/
port, R/
R/ W
P75C
P75F
P15C
P45F
P55F
P65C
P65F
0: Port
0/1
0/1
0/1
0: Port
5
0
−
0
−
0
−
−
0: Port
−
0
−
−
B
B
,
W
0: Input port
1: Output
0:Port
1: EA25
0: Input
0: Input
port,
EA25
P74C
P14C
P44F
P54F
P64C
P64F
P74F
0/1
0/1
0/1
1: Address bus (A16~A23)
1: Address bus (A8~A15)
−
−
4
0
−
−
−
0
−
−
0
0
1: Address bus (A0~A7)
W
W
W
W
W
W
0: Input port
1: Output
0:Port
1: EA24
1: Output
1:Output
port,
EA24
P13C
P63C
P73C
P43F
P53F
P63F
P73F
0/1
0/1
0/1
3
−
−
−
−
−
0
−
0
−
0
0
W
0: Input port
1: Output
0: Port
1:
NDWE
port,
<P72> = 0,
<P72> = 1
<P72> = 0,
<P72> = 1
NDWE @
WRLU
WRLU
P12C
P62C
P72C
P42F
P52F
P62F
P72F
0/1
0/1
0/1
2
0
−
−
−
0
−
−
0
−
0
−
@
@
@
0: Input port
1: Output
0: Port
1:
port,
<P71> = 0,
<P71> = 1
<P71> = 0,
<P71> = 1
NDRE @
WRLL @
NDRE
WRLL
P11C
P41F
P51F
P61C
P61F
P71C
P71F
0/1
0/1
0/1
1
0
−
−
−
0
−
−
0
−
0
−
TMP92CF26A
@
@
2009-06-25
0: Port
1:Data bus
0: Port
1:
(D8~D15)
RD
P10C
P60C
P40F
P50F
P60F
P70F
P1F
0/1
0/1
0/1
0/1
W
0
0
−
−
−
−
0
−
−
0
−