TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 700

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

Symbol
PGFC
PMFC
PKFC
PJCR
PJFC
PLFC
(1) I/O ports (6/11)
PORTG
function
register
PORTJ
control
register
PORTJ
function
register
PORTK
function
register
PORTL
function
register
PORTM
function
register
Name
Address
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
004EH
004FH
005BH
0043H
RMW)
RMW)
0053H
RMW)
0057H
RMW)
RMW)
RMW)
0: Port
1: SDCKE
0: Port
1: LGOE2
0: Port
1: PWE
PM7F
PK7F
PJ7F
PL7F
W
7
−
−
−
−
0
0
0
0
0: Port
1:NDCLE
0: Port
1: LGOE1
0:Input
PK6F
PJ6C
PJ6F
PL6F
6
−
−
−
−
0
0
0
0
92CF26A-698
W
0: Port
1: NDALE
0: Port
1: LGOE0
1: Output
0: Port
PK5F
PJ5C
PL5F
PJ5F
5
0
−
0
−
0
−
0
−
0: Port
1:SDLUDQM
0: Port
1: LHSYNC
1: Data bus for LCDC (LD7~LD0)
PK4F
PL4F
PJ4F
4
0
−
0
−
0
−
W
W
W
0: Port
1:SDLLDQM
0: Port
1: LVSYNC
0:Input
1:
port,AN3
PG3F
ADTRG
PK3F
PL3F
PJ3F
W
3
0
−
0
−
0
−
0
−
0: Port
1:
0: Port
1:
0: Port
1: LFR
MLDALM
<PM2>=1,
ALARM
<PM2>=1
SDWE
SRWR
PM2F
PK2F
PL2F
PJ2F
2
0
−
0
−
0
−
0
−
at
,
at
W
0: Port
1:MLDALM
0: Port
1:
0: Port
1: LLOAD
at <PM1>=0
TA1OUT
at <PM1>=1
SDCAS
SRLUB
PM1F
PK1F
PL1F
PJ1F
1
0
−
0
−
0
−
0
−
TMP92CF26A
,
2009-06-25
0: Port
1:
0: Port
1: LCP0
SDRAS
SRLLB
PK0F
PJ0F
PL0F
0
−
−
−
0
0
0
,