TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 725

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

Set Descriptor
USBREADY
USBINTFR1
USBINTFR2
USBINTFR3
USBINTFR4
Symbol
Port Status
FRAME_H
ADDRESS
FRAME_L
STALL
(8) USB controller (5/6)
Port
status
register
Frame
register
Low
Frame
register H
Address
register
USB
ready
register
Set-
Descriptor
stall
register
USB
interrupt
flag
register 1
USB
interrupt
flag
register 2
USB
interrupt
flag
register 3
USB
interrupt
flag
register 4
Name
Address
(Prohibit
(Prohibit
(Prohibit
(Prohibit
07E0H
07E1H
07E2H
07E3H
07E6H
07E8H
07F0H
07F1H
07F2H
07F3H
RMW)
RMW)
RMW)
RMW)
INT_URST_STR INT_URST_END
Reserved7 Reserved6 PaperError
When read 0: Not generate interrupt
EP1_FULL_A
EP3_FULL_A
INT_SETUP
T[10]
When read
When write
7
0
−
0
0
0
0
0
0
When read 0: Not generate interrupt
EP1_Empty_A
EP3_Empty_A
When read 0: Not generate interrupt
INT_EP0
1: Generate interrupt
T[6]
T[9]
A6
6
0
0
0
0
0
0
0
0
0:Not generate interrupt
1:
1:Generate interrupt
0: Clear flag
92CF26A-723
−
R/W
R
1: Generate interrupt
1: Generate interrupt
EP1_FULL_B
EP3_FULL_B
INT_STAS
INT_SUS
T[5]
T[8]
A5
5
0
0
0
0
0
0
0
0
R/W
INT_RESUME INT_CLKSTOP
EP1_Empty_B
EP3_Empty_B
When write
INT_STASN
Select
R/W
T[4]
T[7]
A4
4
1
0
0
0
0
0
0
0
R/W
W
R
When write 0: Clear flag
EP2_FULL_A
1: −
NotError
0: Clear flag
When write
INT_EP1N
T[3]
A3
R
3
1
0
0
0
0
0
EP2_Empty_A
Reserved2 Reserved1 Reserved0
1: −
INT_CLKON
CREATE
INT_EP2N
0: Clear flag
1: −
T[2]
A2
2
0
0
0
0
0
0
0
FRAME_STS1 FRAME_STS0
EP2_FULL_B
TMP92CF26A
INT_EP3N
T[1]
A1
R
1
0
0
1
0
0
0
2009-06-25
USBREADY
S_D_STALL
EP2_Empty_B
R/W
T[0]
A0
W
0
0
0
0
0
0
0
0