TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 737

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

NDECCRD0
NDECCRD1
NDFMCR0
NDFMCR1
Symbol
(11) NAND-Flash controller (1/4)
NANDF
Control0
Register
NANDF
Control1
Register
NANDF
Code ECC
Register0
NANDF
Code ECC
Register1
Name
Address
(Prohibit
(Prohibit
08C0H
08C1H
08C2H
08C3H
08C4H
08C5H
08C6H
08C7H
RMW)
RMW)
Strobe pulse width
(Low width of
Inserted width
Ready
interrupt
0: Disable
1: Enable
NDWE
WE
enable
0: Disable
1: Enable
= (f
INTERDY
ECCD15
ECCD15
STATE3
SPLW1
ECCD7
ECCD7
SYS
R/W
WE
7
0
0
0
0
0
0
0
0
)
) × (set value)
Reed-
Solomon
calculation
end interrupt
0: Disable
1: Enable
ALE
control
0: “L” out
1: “H” out
NDRE
ECCD14
ECCD14
INTRSC
STATE2
SPLW0
ECCD6
ECCD6
ALE
R/W
6
0
0
0
0
0
0
0
0
,
Status read (See the table below.)
92CF26A-735
Strobe pulse width
(High width of NDRE ,
Inserted width
NDWE )
CLE
control
0: “L” out
1: “H” out
= (f
ECCD13
ECCD13
STATE1
SPHW1
ECCD5
ECCD5
CLE
SYS
5
0
0
0
0
0
0
0
) × (set value)
NAND Flash ECC Register (15-8)
NAND Flash ECC Register (15-8)
NAND Flash ECC Register (7-0)
NAND Flash ECC Register (7-0)
R/W
R
control
0: “H” out
1: “L” out
CE
ECCD12
ECCD12
STATE0
SPHW0
ECCD4
ECCD4
CE0
0
4
0
0
0
0
0
0
0
R/W
R
R
R
R
Reed-
Solomon
ECC
latch
0: Disable
1: Enable
Undefined Undefined
control
0: “H” out
1: “L” out
CE
RSECCL
ECCD11
ECCD11
ECCD3
ECCD3
SEER1
CE1
1
3
0
0
0
0
0
0
Reed-
Solomon
operation
0: Encode
1: Decode
Data bus
width
0: 8-bit
1: 16-bit
ECC
circuit
control
0: Disable
1: Enable
ECCD10
ECCD10
(Write)
(Read)
RSEDN
ECCD2
ECCD2
SEER0
BUSW
ECCE
R/W
2
0
0
0
0
0
0
0
Reed-
Solomon
error
calculation
start
0: −
1: Start
*Always read
ECC
calculation
0:Hamming
1: Reed-
NAND
Flash
state
1: Busy
0: Ready
RSESTA
as “0”.
Solomon
ECCD1
ECCD9
ECCD1
ECCD9
ECCS
BUSY
R/W
W
1
0
0
0
0
0
0
0
TMP92CF26A
2009-06-25
Reed-
Solomon
ECC
generator
write control
0: Disable
1: Enable
Clock
control
0: Disable
1: Enable
ECC
reset
control
0: −
1: Reset
*Always
read as
“0”.
RSECGW
ECCRST
SYSCKE
ECCD0
ECCD8
ECCD0
ECCD8
R/W
R/W
0
0
0
0
0
0
0
0