TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 756

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

ADCM0REGH
ADCM1REGH
ADCM0REGL
ADCM1REGL
ADREGSPH
ADREGSPL
ADMOD0
Symbol
(18) AD converter (2/3)
High priority
Conversion
Register SP
low
High priority
Conversion
Register SP
high
AD
Conversion
Result
Compare
Criterion
Register 0
Low
AD
Conversion
Result
Compare
Criterion
Register 0
High
AD
Conversion
Result
Compare
Criterion
Register 1
Low
AD
Conversion
Result
Compare
Criterion
Register 1
High
AD mode
control
register 0
Name
Address
12B0H
12B1H
12B4H
12B5H
12B6H
12B7H
12B8H
Store Lower 2 bits of an
Store Lower 2 bits of an
Store Lower 2 bits of an
Normal AD
conversion
end flag
0:During
1:Complete
ADRSP1
ADRSP9
AD conversion result
AD conversion result
AD conversion result
conversion
sequence
or before
starting
conversion
sequence
ADR21
ADR29
ADR21
ADR29
compare criterion
compare criterion
EOS
7
R
0
0
0
0
0
0
0
R/W
R/W
R
Normal AD
conversion
BUSY Flag
0:Stop
1:During
ADRSP0
ADRSP8
conversion
conversion
ADR20
ADR28
ADR20
ADR28
BUSY
Store Upper 8 bits of an AD conversion result compare criterion
Store Upper 8 bits of an AD conversion result compare criterion
6
0
0
0
0
0
0
0
92CF26A-754
ADRSP7
Store Upper 8 bits of an AD conversion result
ADR27
ADR27
5
0
0
0
AD
conversion
when
IDLE2 mode
0: Stop
1: Operate
ADRSP6
ADR26
ADR26
I2AD
4
0
0
0
0
R/W
R/W
R
Start Normal
AD
conversion
0: Don’t Care
1:Start AD
Always read
as”0”.
ADRSP5
conversion
ADR25
ADR25
ADS
3
0
0
0
0
Normal AD
conversion
at Hard ware
trigger
0: Disable
1: Enable
ADRSP4
HTRGE
ADR24
ADR24
R/W
2
0
0
0
0
Select Hard ware trigger
00: INTTB00 interrupt
01: Reserved
10:
11: Reserved
Overrun
1: Generate
ADRSP3
OVSRP
ADR23
ADR23
TSEL1
ADTRG
1
R
0
0
0
0
0
TMP92CF26A
2009-06-25
AD conversion
result store flag
1:Stored
ADRSPRF
ADRSP2
ADR22
ADR22
TSEL0
R
0
0
0
0
0
0