TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 765

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
6.
6.1
Points of Note and Restrictions
(1) The notation for built-in I/O registers is as follows: Register symbol <Bit symbol>
(2) Read-modify-write instructions (RMW)
(3) f
Notation
OSCH
same memory location in one instruction.
PLLCR0<FCSEL> is referred to as fc.
frequency given by f
Example: TA01RUN<TA0RUN> denotes bit TA0RUN of register TA01RUN.
An instruction in which the CPU reads data from memory and writes the data to the
Example 1:
Example 2:
The clock frequency input on pins X1 and 2 is referred to as f
The clock selected by SYSCR1<GEAR2:0> is referred to as system clock f
One cycle of f
, fc, f
Examples of read-modify-write instructions on the TLCS-900:
Exchange instruction
Arithmetic operations
Logic operations
Bit manipulation operations
Rotate and shift operations
EX
ADD (mem), R/#
SUB (mem), R/#
INC #3, (mem)
AND (mem), R/#
XOR (mem), R/#
STCF #3/A, (mem)
SET #3, (mem)
TSET #3, (mem)
RLC (mem)
RL
SLA (mem)
SLL (mem)
RLD (mem)
SYS
, f
(mem), R
(mem)
IO
SYS
SET
INC
and one state
is referred to as one state.
SYS
3, (TA01RUN); Set bit3 of TA01RUN.
1, (100H); Increment the data at 100H.
divided by 2 is referred to as f
ADC (mem), R/#
SBC
DEC #3, (mem)
OR
RES
CHG #3, (mem)
RRC (mem)
RR
SRA
SRL
RRD (mem)
92CF26A-763
(mem), R/#
(mem), R/#
#3, (mem)
(mem)
(mem)
(mem)
IO
.
OSCH
. The clock selected by
SYS
TMP92CF26A
2009-06-25
. The clock

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