TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 79

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

(1)
INTETA01
INTETA23
INTETA45
INTETA67
Symbol
INTE12
INTE34
INTE56
INTE0
INTE7
Interrupt priority setting registers
INT0
enable
INT1 & INT2
enable
INT3 & INT4
enable
INT5 & INT6
enable
INT7
enable
INTTA0 & INTTA1
enable
INTTA2 & INTTA3
enable
INTTA4 & INTTA5
enable
INTTA6 & INTTA7
enable
Interrupt request flag
Name
Address
D0H
D1H
D2H
D3H
D4H
D5H
D6H
D7H
F0H
ITA1C
ITA3C
ITA5C
ITA7C
I2C
I4C
I6C
7
R
R
R
R
R
R
R
−
−
0
0
0
−
−
0
0
0
0
lxxM2
0
0
0
0
1
1
1
1
92CF26A-77
ITA1M2
ITA3M2
ITA5M2
ITA7M2
I2M2
I4M2
I6M2
INTTA1 (TMRA1)
INTTA3 (TMRA3)
INTTA5 (TMRA5)
INTTA7 (TMRA7)
Always write “0”.
Always write “0”.
6
−
0
0
0
−
0
0
0
0
lxxM1
INT2
INT4
INT6
−
−
0
0
1
1
0
0
1
1
ITA1M1
ITA3M1
ITA5M1
ITA7M1
I2M1
I4M1
I6M1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
5
−
−
0
0
0
−
−
0
0
0
0
lxxM0
1
0
1
0
1
0
0
1
ITA1M0
ITA3M0
ITA5M0
ITA7M0
I2M0
I4M0
I6M0
4
−
0
0
0
−
0
0
0
0
Disables interrupt requests
Sets interrupt priority level to 1
Sets interrupt priority level to 2
Sets interrupt priority level to 3
Sets interrupt priority level to 4
Sets interrupt priority level to 5
Sets interrupt priority level to 6
Disables interrupt requests
ITA2C
ITA4C
ITA6C
ITA0C
I0C
I1C
I3C
I5C
I7C
3
R
R
R
R
R
R
R
R
R
0
0
0
0
0
0
0
0
0
Function (Write)
ITA0M2
ITA2M2
ITA4M2
ITA6M2
I0M2
I1M2
I3M2
I5M2
I7M2
INTTA0 (TMRA0)
INTTA2 (TMRA2)
INTTA4 (TMRA4)
INTTA6 (TMRA6)
2
0
0
0
0
0
0
0
0
0
INT0
INT1
INT3
INT5
INT7
TMP92CF26A
ITA0M1
ITA2M1
ITA4M1
ITA6M1
2009-06-25
I0M1
I1M1
I3M1
I5M1
I7M1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
1
0
0
0
0
0
0
0
0
0
ITA0M0
ITA2M0
ITA4M0
ITA6M0
I0M0
I1M0
I3M0
I5M0
I7M0
0
0
0
0
0
0
0
0
0
0