TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 81

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

INTENDFC
INTEI2S01
Symbol
INTELCD
0INTEAD
INTEP0
Interrupt request flag
INTLCD
enable
INTI2S0 &
INTI2S1
enable
INTRSC &
INTRDY
enable
INTP0
enable
INTAD &
INTADHP
enable
Name
Address
ECH
EAH
EBH
EEH
EFH
IADHPC IADHPM2 IADHPM1 IADHPM0
IRSCC
II2S1C
7
R
R
R
−
−
0
0
−
−
0
lxxM2
IRSCM2
II2S1M2
Always write “0”.
Always write “0”.
0
0
0
0
1
1
1
1
92CF26A-79
6
−
0
0
−
0
INTADHP
INTI2S1
INTRSC
−
−
lxxM1
II2S1M1
IRSCM1
R/W
R/W
R/W
0
0
1
1
0
0
1
1
5
−
−
0
0
−
−
0
II2S1M0
IRSCM0
lxxM0
1
0
1
0
1
0
0
1
4
−
0
0
−
0
Disables interrupt requests
Sets interrupt priority level to 1
Sets interrupt priority level to 2
Sets interrupt priority level to 3
Sets interrupt priority level to 4
Sets interrupt priority level to 5
Sets interrupt priority level to 6
Disables interrupt requests
ILCD1C
I I2S0C
IRDYC
IADC
IP0C
R/W
R/W
3
R
R
R
0
0
0
0
0
IRDYM2
ILCDM2
II2S0M2
IADM2
IP0M2
Function (Write)
2
0
0
0
0
0
INTLCD
INTI2S0
INTRDY
INTAD
INTP0
IRDYM1
ILCDM1
II2S0M1
IADM1
IP0M1
R/W
R/W
R/W
R/W
R/W
TMP92CF26A
1
0
0
0
0
0
2009-06-25
II2S0M0
IRDYM0
ILCDM0
IADM0
IP0M0
0
0
0
0
0