TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 97

no-image

TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
3.6.3
(1) Overall flowchart
DMAC Operation Description
requested.
Figure 3.6.9 shows a flowchart for DMAC operation when an interrupt (DMA) is
Figure 3.6.9 Overall Flowchart
No
No
Interrupt request F/F clear
Interrupt (DMA) request
Interrupt specified by
HDMACAn -1=0?
HDMACBn -1=0?
DMA start vector?
& bus REQ assert
Bus REQ deassert
Internal timer start
92CF26A-95
Timer match?
HDMADn write
HDMASn read
Bus ACK?
END
Yes
Yes
No
No
Yes
Yes
Yes
INTDMAn assert
No
To general-purpose interrupt or
micro DMA processing flow
TMP92CF26A
2009-06-25

Related parts for TMP92xy26AXBG