FAN9612 Fairchild Semiconductor, FAN9612 Datasheet
FAN9612
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FAN9612 Summary of contents
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... BCM operation of the boost converters, provides automatic power factor correction. The controllers offers bias UVLO (10V / 7.5V for FAN9611 and 12.5V / 7.5V for FAN9612), input brownout, over-current, open-feedback, output over- voltage, and redundant latching over-voltage protections. Furthermore, the converters’ output power is limited independently of the input RMS voltage ...
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... PCB design and operating conditions, such as air flow. The range of values JA covers a variety of operating conditions utilizing natural convection with no heatsink on the package. 3. This typical range is an estimate; actual values depend on the application. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 Package Figure 2. SOIC-16 (Top View) Suffix (1) Θ ...
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... Typical Application Diagram LINE EMI Filter R INHYST Block Diagram © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 R ZCD2 R IN1 R ZCD1 1 ZCD1 CS1 ZCD2 CS2 15 IN2 C 5VB 3 14 5VB VDD 4 13 MOT DRV1 R R MOT G1 5 AGND ...
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... CS2 Current Sense Input for Phase 2 of the interleaved boost power stage. 16 CS1 Current Sense Input for Phase 1 of the interleaved boost power stage. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 Figure 5. Pin Layout (Top-View) Description 4 error amplifier M www.fairchildsemi.com ...
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... If the mismatch is greater than ±10%, current sharing is proportionately worse, requiring over-design of the power supply. However, the accurate 180° out-of-phase synchronization is still maintained, providing current cancellation, although its effectiveness is reduced. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 Parameter Parameter (4) 5 Min ...
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... Restart Timer (Each Channel) f Minimum Switching Frequency SW,MIN Frequency Clamp (Each Channel) f Maximum Switching Frequency SW,MAX © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 = -40°C to +125°C. Currents are defined as positive into the device and J Conditions – 0. Output Not Switching ...
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... OVPNL_HYS Over-Voltage Protection Using OVP Pin – Latching (Input) V Latching OVP Threshold (+15%) OVPLCH Note: 5. Not tested in production. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 Continued ( ) = -40°C to +125°C. Currents are defined as positive into the device and J Conditions ...
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... Boundary Conduction Mode (BCM), the new switching period is initiated when the inductor current returns to zero. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 There are many fundamental differences in CCM and BCM operations and the respective designs of the boost converter. ...
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... Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 a sine square function. Eliminating the line frequency component from the feedback system is imperative to maintain low total harmonic distortion (THD) in the input current waveform ...
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... PFC controller when an independent bias power supply is not present in the system. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 At startup condition and in the unlikely case of missing zero current detection, the lack of an oscillator would mean that the converter stops operating. To overcome ...
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... By adjusting maximum on-time (using R management thresholds can be adjusted upward, described in the “Adjusting the Phase-Management Thresholds” section of this datasheet. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 Figure 15. Automatic Phase-Control Operation 10. Brownout Protection with Soft Recovery An additional protection function usually offered by PFC IN_RMS ...
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... Potentially, this behavior can be utilized to control the inrush current limiting circuit. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 FAN9611/12 employs closed-loop soft-start where the reference voltage of the error amplifier is slowly increased to its final value. When the current and power ...
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... Therefore the FB © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 voltage stays flat or even decays while the SS voltage keeps rising. This is a problem if closed-loop soft-start should be maintained. By clamping the SS voltage to the FB pin, this problem can be mitigated ...
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... FAN9611/12 does not send out gate drive signals to the boost transistors. Figure 21. Output-Voltage Feedback Circuit © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 Figure 20. Error Amplifier Compensation Circuitry 8. Secondary Output Voltage Sense (OVP) A second-level latching over-voltage protection can be implemented using the OVP pin of the controller ...
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... AC ripple into the control loop. If line zero crossing detection is missing, the FAN9611/12 measures the input voltage in every 32ms; it can operate from a DC © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 the integrator while the peak detector works properly ) IN during light-load operation. ...
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... OUT swings between 1/3 to 2/3 V and the MOS devices pull the output to the high DD or low rail. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 50Hz DC 10ms forced reset after 32ms Figure 24. Input Voltage Sensing Waveforms The purpose of the MillerDrive™ architecture is to ...
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... V voltage is monitored by the under-voltage lockout DD (UVLO) circuit. At power-up, the V exceed 10.0V (±0.5V) for FAN9611 and exceed 12.5V (±0.5V) for FAN9612 to enable operation. Both the FAN9611 and the FAN9612 stops operating when the V voltage falls below 7.5V (±0.5V). See PGND pin DD description for important bypass information. ...
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... This is useful if the auxiliary power is 12V or below. This configuration also allows bias power designs using a bootstrap winding to start the FAN9612 without a dedicated startup resistor. In the boost PFC topology, the output voltage is pre- charged to the peak line voltage by the boost diode ...
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... When the output power comes back up to 18%, the FAN9611/12 automatically goes from the single-phase to the two-phase operation (phase-add). © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 The default thresholds can be adjusted upward based on the application requirement; for example, to meet the Energy STAR 5.0 or the Climate Savers Computing efficiency requirements at 20% of the load ...
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... Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 d. Pull the VIN Pin to GND. Since the VIN sense circuit is configured to ride through a single line ...
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... The gate drive pattern should be as short as possible to minimize interference. Current Sensing Current sensing should be as short as possible. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 To minimize switching noise, current sensing should not make a loop. Input Voltage Sensing ( ...
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... Feedback Divider Over Voltage Sense Divider Over Voltage Sense Divider Input Voltage Sense Divider © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 Input Voltage Sense Divider Brownout Hysteresis Set Gate Drive Resistor Gate Drive Speed-Up Diode Bypass Capacitor for VDD_HF ...
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... In general, the value of 0.95 can be used unless a more accurate power budget is available. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 Step 3: Maximum Output Power per Channel P OUT ...
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... I t L,PK ON,MAX L Step 8: Maximum DC Output Current MAX, CH I OUT,MAX V OUT © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 Step 9: Zero Current Detect Resistors (7) V OUT,RIPPLE R ZCD1 t HOLD 2 where 0.5 (8) 2 V resonant waveform across the boost inductor during ...
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... It should also be sufficiently lower then the switching frequency of the © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 converter so noise can be effectively attenuated. The recommended f (19) applications ...
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... Figure 36 can be used. Figure 36. Gate Drive Schematic with Independent Turn-On and Turn-Off © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 The FAN9611/12 sources high peak current to the MOSFET gate through R and D G control the turn-on transition time. When the MOSFET is ...
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... Typical Performance Characteristics — Supply Typical characteristics are provided at T Figure 37. I vs. Temperature STARTUP Figure 39. UVLO Thresholds vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 = 25°C and V = 12V unless otherwise noted Figure 38. Operating Current vs. Temperature Figure 40. UVLO Hysteresis vs. Temperature 27 www ...
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... Typical Performance Characteristics — Control Typical characteristics are provided at T Figure 41. Transfer Function (Maximum On Time vs. V Figure 43. EA Transconductance (g Temperature Figure 45. 5V Reference vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 = 25°C and V = 12V unless otherwise noted Figure 42. Maximum On Time vs. Temperature ) ...
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... Typical Performance Characteristics — Control Typical characteristics are provided at T Figure 47. Phase-Control Thresholds vs. Temperature Figure 48. Phase-Dropping Operation © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 = 25°C and V = 12V unless otherwise noted Gate Drive 1 Gate Drive 1 Gate Drive 2 Gate Drive 2 ...
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... Typical Performance Characteristics — Protection Typical characteristics are provided at T Figure 50. CS Threshold vs. Temperature Figure 52. Restart Timer Frequency vs. Temperature Figure 54. Brownout Threshold vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 = 25°C and V = 12V unless otherwise noted Figure 51 OUT Delay vs. Temperature Figure 53 ...
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... Typical Performance Characteristics — Protection Typical characteristics are provided at T Figure 55. Non-Latching OVP vs. Temperature Figure 57. OVP Hysteresis vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 = 25°C and V = 12V unless otherwise noted Figure 56. Latching OVP vs. Temperature 31 www.fairchildsemi.com ...
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... Line Current Note: 6. For full performance operational characteristics at both low line (110V load and full-load, refer to FEB279 Evaluation Board User Guide: 400W Evaluation Board using FAN9612. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 = 25°C and V = 12V unless otherwise noted. ...
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... Output Power (%) Figure 65. Measured Efficiency at 115V (Adjusted Thresholds) © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 Figure 63 and Figure 64 show the phase management with the default minimum threshold values of the IC. They can be adjusted upwards to achieve a different efficiency profile (Figure 65 and Figure 66) where phase management thresholds are adjusted to 30% / 44% of the full load ...
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... FAN9612 Controller Related Resources AN-6086: Design Consideration for Interleaved Boundary Conduction Mode (BCM) PFC Using FAN9612 AN-9717: Fairchild Evaluation Board User Guide FEB388: 400W Evaluation Board using FAN9611/12 AN-8021: Building Variable Output Voltage Boost PFC Converters Using FAN9612 References 1 ...
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... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2008 Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 10.00 A 9.80 8.89 ...
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... Fairchild Semiconductor Corporation FAN9611 / FAN9612 • Rev. 1.1.4 36 www.fairchildsemi.com ...