FAN4800AU Fairchild Semiconductor, FAN4800AU Datasheet - Page 5

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FAN4800AU

Manufacturer Part Number
FAN4800AU
Description
The highly integrated FAN4800AU/CU parts are specially designed for power supplies that consist of boost PFC and PWM
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2011 Fairchild Semiconductor Corporation
FAN4800AU/CU • Rev. 1.0.0
Pin Configuration
Pin Definitions
Pin #
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
ISENSE
FBPWM
FBPFC
OPWM
Name
RT/CT
VRMS
RAMP
ILIMIT
OPFC
VREF
GND
VDD
VEA
IAC
IEA
SS
Output of PFC Current Amplifier. The signal from this pin is compared with an internal
sawtooth to determine the pulse width for the PFC gate drive.
Input AC Current. For normal operation, this input provides a current reference for the
multiplier. The suggested maximum I
PFC Current Sense. The inverting input of the PFC current amplifier and the output of
multiplier and PFC I
Line-Voltage Detection. The pin is used for the PFC multiplier.
PWM Soft-Start. During startup, the SS pin charges an external capacitor with a 10µA constant
current source. The voltage on FBPWM is clamped by SS during startup. If a protection
condition occurs and/or PWM is disabled, the SS pin is quickly discharged.
PWM Feedback Input. The control input for voltage-loop feedback of PWM stage.
Oscillator RC Timing Connection. Oscillator timing node; timing set by R
PWM RAMP Input. In Current Mode, this pin functions as the current-sense input. In Voltage
Mode, it is the feed-forward sense input from PFC output 380V (feed-forward ramp).
Peak Current Limit Setting for PWM. The peak current limit setting for PWM.
Ground
PWM Gate Drive. The totem-pole output drive for the PWM MOSFET. This pin is internally
clamped under 19V to protect the MOSFET.
PFC Gate Drive. The totem-pole output drive for PFC MOSFET. This pin is internally clamped
under 15V to protect the MOSFET.
Supply. The power supply pin. The threshold voltages for startup and turn-off are 11V and
9.3V, respectively. The operating current is lower than 10mA.
Reference Voltage. Buffered output for the internal 7.5V reference.
Voltage Feedback Input for PFC. The feedback input for PFC voltage loop. The inverting input
of PFC error amplifier. This pin is connected to the PFC output through a divider network.
Output of PFC Voltage Amplifier. The error amplifier output for PFC voltage feedback loop.
A compensation network is connected between this pin and ground.
Figure 6. Pin Configuration (Top View)
LIMIT
comparator.
5
AC
is 65µA.
Description
T
and C
T
.
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