FDMF6708N Fairchild Semiconductor, FDMF6708N Datasheet
FDMF6708N
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FDMF6708N Summary of contents
Page 1
... A thermal warning function warns of a potential over-temperature situation. The FDMF6708N also incorporates a Zero- Cross Detect (ZCD_EN#) for improved light-load efficiency. The FDMF6708N also provides a 3-state 5V PWM input for compatibility with a wide range of PWM controllers. Applications ...
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... VCIN DISB# 10µA V CIN R UP_PWM Input PWM 3- State Logic R DN_PWM THWN# Temp. Sense CGND © 2011 Fairchild Semiconductor Corporation FDMF6708N • Rev. 1.0.2 VDRV VCIN VIN R BOOT DISB# BOOT PWM FDMF6708N PHASE ZCD_EN# VSWH THWN# CGND PGND Figure 1. Typical Application Circuit VDRV ...
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... LOW). This pin has a 10µA internal pull-down current source. Do not add a noise filter capacitor. 40 PWM PWM signal input. This pin accepts a three-state 5V PWM signal from the controller. © 2011 Fairchild Semiconductor Corporation FDMF6708N • Rev. 1.0.2 Figure 4. Top View Description 3 www.fairchildsemi.com ...
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... MOSFET switching transients. For reliable DrMOS operation, VSWH-to-GND and BOOT-to-GND must remain at or below the Absolute Maximum Ratings shown in the table above. Refer to the “Application Information” and “PCB Layout Guidelines” sections of this datasheet for additional information. © 2011 Fairchild Semiconductor Corporation FDMF6708N • Rev. 1.0.2 Parameter Referenced to CGND Referenced to CGND ...
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... High-Level Input Voltage IH_ZCD_EN V Low-Level Input Voltage IL_ZCD_EN I Pull-Up Current PLU t Propagation Delay PD_ZLGLL t Propagation Delay PD_ZHGLH © 2011 Fairchild Semiconductor Corporation FDMF6708N • Rev. 1.0 5V, and +25°C unless otherwise noted. CIN DRV A J Condition PWM=LOW or HIGH or Float Q VCIN ...
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... PD_TSGLH Delay GL Minimum On Time in t GL-ON_MIN DCM Boot Diode V Forward-Voltage Drop F V Breakdown Voltage R © 2011 Fairchild Semiconductor Corporation FDMF6708N • Rev. 1.0 5V, and +25°C unless otherwise noted. CIN DRV A J Condition 5kΩ resistor pull- 30A +25°C) OUT ...
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... V IH_PWM PWM VSWH VSWH t PD PHGLL t D_DEADON © 2011 Fairchild Semiconductor Corporation FDMF6708N • Rev. 1.0.2 90% 1.7V 10 PLGHL Figure 5. PWM Timing Diagram 7 V IL_PWM 10% 90% 1.7V t D_DEADOFF www.fairchildsemi.com ...
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... V IN DRV CIN OUT 1.5 1.4 1.3 1.2 1.1 1.0 0.9 100 200 300 400 500 600 Module Switching Frequency, F Figure 10. Power Loss vs. Switching Frequency © 2011 Fairchild Semiconductor Corporation FDMF6708N • Rev. 1.0.2 =1V, V =5V, V =5V, L OUT CIN DRV 1000kHz OUT ...
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... Figure 14. Power Loss vs. Output Inductor 12V 1V 300kHz OUT 4.0 4.5 5.0 Driver Supply Voltage, V Figure 16. Driver Supply Current vs. Driver Supply Voltage © 2011 Fairchild Semiconductor Corporation FDMF6708N • Rev. 1.0.2 =1V, V =5V, V =5V, L =250nH, T CIN DRV OUT 1.8 = 30A OUT 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 5.0 5.5 6.0 0.5 & ...
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... Driver IC Junction Temperature, T Figure 20. PWM Threshold vs. Temperature 1 CIN 1.7 1.6 1.5 1.4 1.3 1.2 - Driver IC Junction Temperature, T Figure 22. ZCD_EN# Threshold vs. Temperature © 2011 Fairchild Semiconductor Corporation FDMF6708N • Rev. 1.0.2 =5V, T =25°C, and natural convection cooling, unless otherwise specified. A 4.5 4.0 UVLO UP 3.5 3.0 2.5 2.0 1.5 UVLO DN 1.0 0.5 4.50 55 100 125 150 ...
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... DISB# Threshold vs. Driver Supply Voltage CIN - Driver IC Junction Temperature, T Figure 26. DISB# Pull-Down Current vs. Temperature © 2011 Fairchild Semiconductor Corporation FDMF6708N • Rev. 1.0.2 =5V, T =25°C, and natural convection cooling, unless otherwise specified. A 1.8 1.7 V IH_DISB# 1.6 1.5 V IL_DISB# 1.4 1.3 1.2 5.25 5.50 (V) CIN Figure 25. 700 ...
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... PWM input goes from three-state to LOW, the low-side MOSFET is turned on. If the PWM input goes from Driver State three-state to HIGH, the high-side MOSFET is turned on. This is illustrated in Figure 29. The FDMF6708N design allows for short propagation delays when exiting the three-state window (see Electrical Characteristics). Low-Side Driver ...
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... ZCD_EN# rise rise, V PD_ZHGLH GS IH_ZCD_EN © 2011 Fairchild Semiconductor Corporation FDMF6708N • Rev. 1.0.2 HIGH, Q2 begins to turn off after a propagation delay (t PD_PHGLL Q1 begins to turn on after adaptive delay t To preclude overlap during the HIGH-to-LOW transition (Q1 off to Q2 on), the adaptive circuitry monitors the voltage at the GH-to-PHASE pin pair ...
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... LOW by the PWM controller to support light-load Power- Saving Mode, FDMF6708N can actively turn off the low- side MOSFET when it detects the zero crossing of the inductor current. The low-side MOSFET turns on when inductor current is positive (LS MOSFET drain current is negative) and turns off when inductor current is negative (LS MOSFET drain current is positive) ...
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... ON Open - Drain Output © 2011 Fairchild Semiconductor Corporation FDMF6708N • Rev. 1.0.2 VCIN Filter The VDRV pin provides power to the gate drive of the high-side and low-side power MOSFET. In most cases, it can be connected directly to VCIN, the pin that provides power to the logic section of the driver. For additional noise immunity filter can be inserted between the VDRV and VCIN pins ...
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... MOSFET, balance using the largest area possible to improve DrMOS cooling while maintaining acceptable noise emission output inductor should be located close to the FDMF6708N to minimize the power loss due to the V copper trace. Care should also be taken so the SWH inductor dissipation does not heat the DrMOS. ® ...
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... Fairchild Semiconductor Corporation FDMF6708N • Rev. 1.0.2 Figure 33. PCB Layout Example (Top View) Figure 34. PCB Layout Example (Bottom View) 17 www.fairchildsemi.com ...
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... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2011 Fairchild Semiconductor Corporation FDMF6708N • Rev. 1.0.2 B PIN#1 INDICATOR 6. ...
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... Fairchild Semiconductor Corporation FDMF6708N • Rev. 1.0.2 19 www.fairchildsemi.com ...