M25PX64-STVME6E Numonyx, B.V., M25PX64-STVME6E Datasheet - Page 19
M25PX64-STVME6E
Manufacturer Part Number
M25PX64-STVME6E
Description
64-Mbit, dual I/O, 4-Kbyte subsector erase, serial flash memory with 75 MHz SPI bus interface
Manufacturer
Numonyx, B.V.
Datasheet
1.M25PX64-STVME6E.pdf
(66 pages)
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M25PX64
5
Memory organization
The memory is organized as:
Each page can be individually programmed (bits are programmed from ‘1’ to ‘0’). The device
is subsector, sector or bulk erasable (bits are erased from ‘0’ to ‘1’) but not page erasable.
Figure 7.
HOLD
DQ0
DQ1
V
8 388 608 bytes (8 bits each)
2048 subsectors (4 Kbytes each)
128 sectors (64 Kbytes each)
32768 pages (256 bytes each)
64 OTP bytes located outside the main memory array.
PP
C
S
Block diagram
Address register
Control logic
and counter
00000h
I/O shift register
256 bytes (page size)
High voltage
generator
X decoder
data buffer
256 byte
7FFFFFh
000FFh
64 OTP bytes
Memory organization
register
Status
AI13722b
19/66
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