STG3005A2S STMicroelectronics, STG3005A2S Datasheet - Page 38

• Manufacturer Part Number: STG3005A2S
• Description: 128-BIT 3D MULTIMEDIA ACCELERATOR
• Manufacturer: STMicroelectronics

RIVA128ZX
Figure 34. SDRAM/SGRAM random read accesses within a page, read latency of two
NOTE
Figure 35. SDRAM/SGRAM random read accesses within a page, read latency of three
NOTE
Figure 36. SDRAM/SGRAM read to write, read latency of three
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Symbol
t
t
t
t
DH
OH
AC
LZ
1 Covers either successive reads to the active row in a given bank, or to the active rows in different banks. DQMs are all
1 Covers either successive reads to the active row in a given bank, or to the active rows in different banks. FBDQM is all
active (LOW).
active (LOW).
Command
Command
FBA[10:0]
FBD[63:0]
FBA[10:0]
FBD[63:0]
Command
FBA[10:0]
FBD[63:0]
FBCLKx
FBCLKx
Write data hold time
Read data hold time
Read data access time
Data out low impedance time
FBCLKx
TDDQM
Parameter
bank, col n bank, col a bank, col x bank, col m
bank, col n bank, col a bank, col x bank, col m
read
read
bank, col n
read
read
read
-10
1
3
9
0
nop
read
Min.
read
data n
-12
3
1
9
0
128-BIT 3D MULTIMEDIA ACCELERATOR
read
data n
nop
read
-10
data a
-
-
-
-
nop
data a
Max.
nop
-12
nop
read data n
data x
nop
data x
t
HZ
Unit
ns
ns
ns
ns
nop
nop
bank, col b
data m
data m
write
write data b
1
1
t
DS
Notes