PI7C9X110 Pericom Semiconductor Corporation, PI7C9X110 Datasheet - Page 130
PI7C9X110
Manufacturer Part Number
PI7C9X110
Description
Pcie-to-pci Reversible Bridge
Manufacturer
Pericom Semiconductor Corporation
Datasheet
1.PI7C9X110.pdf
(145 pages)
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7.6.24 PRIMARY SET IRQ MASK REGISTER – OFFSET 07Ch
7.6.25 SECONDARY SET IRQ MASK REGISTER – OFFSET 07Ch
7.6.26 RESERVED REGISTERS – OFFSET 080h TO 09Ch
7.6.27 SCRATCHPAD 0 REGISTER – OFFSET 0A0h
7.6.28 SCRATCHPAD 1 REGISTER – OFFSET 0A4h
Pericom Semiconductor
BIT
15:0
BIT
31:16
BIT
31:0
BIT
31:0
FUNCTION
Primary Set IRQ Mask
FUNCTION
Secondary Set IRQ Mask
FUNCTION
Scratchpad 0
FUNCTION
Scratchpad 1
TYPE
TYPE
TYPE
TYPE
RWS
RWC
RW
RW
Page 130 of 145
DESCRIPTION
When writing “1” to this register bit, it set the correspondent interrupt request
mask bit.
When reading this register, it returns the Primary Set IRQ Mask bit status:
0: It allows to set an interrupt request on primary interface
1: It does not allow to set any interrupt request on primary interface
Reset to FFFFh
DESCRIPTION
When writing “1” to this register bit, it set the correspondent interrupt request
mask bit.
When reading this register, it returns the Secondary Set IRQ Mask bit status:
0: It allows to set an interrupt request on secondary interface
1: It does not allow to set any interrupt request on secondary interface
Reset to FFFFh
DESCRIPTION
The scratchpad is a 32-bit internal register that can be accessed from both
primary and secondary interfaces. The external devices can use the
scratchpad as a temporary storage. Primary and secondary bus devices can
communicate through the scratchpad. However, writing and reading the
scratchpad does not generate any interrupt request.
Reset to 00000000h
DESCRIPTION
The scratchpad is a 32-bit internal register that can be accessed from both
primary and secondary interfaces. The external devices can use the
scratchpad as a temporary storage. Primary and secondary bus devices can
communicate through the scratchpad. However, writing and reading the
scratchpad does not generate any interrupt request.
Reset to 00000000h
May 2008, Revision 2.6
PCIe-to-PCI Reversible Bridge
PI7C9X110