MB2146-301A Fujitsu Microelectronics, Inc., MB2146-301A Datasheet - Page 49
MB2146-301A
Manufacturer Part Number
MB2146-301A
Description
8-bit Microcontrollers
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet
1.MB2146-301A.pdf
(64 pages)
- Current page: 49 of 64
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Sampling at the rising edge of sampling clock*
*1 : Provide switch function whether sampling of reception data is performed at rising edge or falling edge of the
*2 : Serial clock delay function is used to delay half clock for the output signal of serial clock.
*3 : Refer to “ (2) Source Clock/Machine Clock” for t
(ESCR register : SCES bit = 0, ECCR register : SCDE bit = 1)
Serial clock cycle time
SCK↑→ SOT delay time
Valid SIN → SCK↓
SCK ↓→ valid SIN hold time
SOT → SCK ↓ delay time
serial clock.
SCK
SOT
SIN
Parameter
2.4 V
0.8 V
Sym-
t
t
t
t
t
bol
SHOVI
SOVLI
SCYC
IVSLI
SLIXI
0.8 V
0.2 V
t
CC
CC
SOVLI
t
SCK, SOT
SCK, SOT
Pin name
IVSLI
SCK, SIN
SCK, SIN
SCK
(V
1
CC
and enabled serial clock delay*
MCLK
0.8 V
operation output pin :
= 5.0 V± 10%, AV
C
L
.
= 80 pF + 1 TTL.
Internal clock
Condition
t
SLIXI
2.4 V
MB95130MB Series
0.8 V
0.2 V
t
SS
SCYC
t
SHOVI
= V
CC
CC
SS
t
MCLK
2.4 V
0.8 V
5 t
= 0.0 V, T
Min
− 95
*
MCLK
⎯
3
0
+ 190
2
*
3
0.8 V
Value
A
= − 40 °C to + 85 °C)
4 t
Max
+95
MCLK
⎯
⎯
⎯
*
3
Unit
ns
ns
ns
ns
ns
49
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