FAN5091 Fairchild Semiconductor, FAN5091 Datasheet - Page 19

• Manufacturer Part Number: FAN5091
• Description: Two Slice Interleaved Synchronous Buck Converter
• Manufacturer: Fairchild Semiconductor

PRODUCT SPECIFICATION
PCB Layout Guidelines
• Placement of the MOSFETs relative to the FAN5091 is
• In general, all of the noisy switching lines should be kept
• Place the 0.1µF decoupling capacitors as close to the
• Each power and ground pin should have its own via to the
• Place the MOSFETs, inductor, and Schottky of a given
• Place the output bulk capacitors as close to the CPU as
• A PC Board Layout Checklist is available from Fairchild
REV. 1.0.0 5/10/01
critical. Place the MOSFETs such that the trace length of
the HIDRV and LODRV pins of the FAN5091 to the FET
gates is minimized. A long lead length on these pins will
cause high amounts of ringing due to the inductance of the
trace and the gate capacitance of the FET. This noise
radiates throughout the board, and, because it is switching
at such a high voltage and frequency, it is very difficult to
suppress.
away from the quiet analog section of the FAN5091. That
is, traces that connect to pins 8-17 (LODRV, HIDRV,
PGND and BOOT) should be kept far away from the
traces that connect to pins 1 through 7, and pins 18-24.
FAN5091 pins as possible. Extra lead length on these
reduces their ability to suppress noise.
appropriate plane. This helps provide isolation between
pins.
slice as close together as possible for the same reasons as
in the first bullet above. Place the input bulk capacitors as
close to the drains of the high side MOSFETs as possible.
In addition, placement of a 0.1 F decoupling cap right on
the drain of each high side MOSFET helps to suppress
some of the high frequency switching noise on the input
of the DC-DC converter.
possible to optimize their ability to supply instantaneous
current to the load in the event of a current transient.
Additional space between the output capacitors and the
CPU will allow the parasitic resistance of the board traces
to degrade the DC-DC converter’s performance under
severe load transient conditions, causing higher voltage
deviation. For more detailed information regarding
capacitor placement, refer to Application Bulletin AB-5.
Applications. Ask for Application Bulletin AB-11.
PC Motherboard Sample Layout and Gerber File
A reference design for motherboard implementation of the
FAN5091 along with the PCAD layout Gerber file and silk
screen can be obtained through your local Fairchild repre-
sentative.
FAN5091 Evaluation Board
Fairchild provides an evaluation board to verify the system
level performance of the FAN5091. It serves as a guide to
performance expectations when using the supplied external
components and PCB layout. Please contact your local
Fairchild representative for an evaluation board.
Additional Information
For additional information contact your local Fairchild
representative.
FAN5091
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