MD16R1624DF0 Samsung Semiconductor, Inc., MD16R1624DF0 Datasheet - Page 4

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MD16R1624DF0

Manufacturer Part Number
MD16R1624DF0
Description
Description = MD16R1624(8/G)DF0, MD18R1624(8/G)DF0 (16Mx16)*4(8/16)pcs RIMM(TM) Module Based on 256Mb D-die, 32s Banks,16K/32ms Ref, 2.5V ;; Density(MB) = 128 ;; Organization = 32Mx32 ;; Component Composition = 256M(5th)x4 ;; Voltage(V) = 2.5 ;; Refr
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
MD16R1624(8/G)DF0 - CN1 for 1200MHz
MD18R1624(8/G)DF0 - CN1 for 1200MHz
CFM_THRU_L
CFM_THRU_R
CFMN_THRU_L
CFMN_THRU_R
CMD_THRU_L
CMD_THRU_R
COL4_THRU_L..C
OL0_THRU_L
COL4_THRU_R..C
OL0_THRU_R
CTM_THRU_L
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
Pin
Signal
Gnd
COL3_THRU_R
Gnd
ROW0_THRU_R
Gnd
ROW2_THRU_R
Gnd
CTM_THRU_R
Gnd
CTMN_THRU_R
Gnd
DQA1_THRU_R
Pin Name
A14
B54
A16
B52
B2
A73
A20, B20, A22, B22, A24
B48, A48, B46, A46, B44
B14
Module Connector Pads
Table 2: Module Pad Numbers and Signal Names (Continued)
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
Pin
Gnd
COL4_THRU_R
Gnd
ROW1_THRU_R
Gnd
CFMN_THRU_R
Gnd
CFM_THRU_R
Gnd
DQA0_THRU_R
Gnd
DQA2_THRU_R
Pin Name
Table 3: Module Connector Pad Description
I/O
I
I
I
I
I
I
I
I
I
V
V
Type
RSL
RSL
RSL
RSL
RSL
RSL
RSL
CMOS
CMOS
Page 3
Clock From Master. Connects to left RDRAM device on "Thru"
Channel. Interface clock used for receiving RSL signals from the
controller. Positive polarity.
Clock From Master. Connects to right RDRAM device on "Thru"
Channel. Interface clock used for receiving RSL signals from the
controller. Positive polarity.
Clock From Master. Connects to left RDRAM device on "Thru"
Channel. Interface clock used for receiving RSL signals from the
controller. Negative polarity.
Clock From Master. Connects to right RDRAM device on "Thru"
Channel. Interface clock used for receiving RSL signals from the
controller. Negative polarity.
Serial Command Input used to read from and write to the control
registers. Also used for power management. Connects to left
RDRAM device on "Thru" Channel.
Serial Command Input used to read from and write to the control
registers. Also used for power management. Connects to right
RDRAM device on "Thru" Channel.
"Thru" Channel Column bus. 5-bit bus containing control and
address information for column accesses. Connects to left RDRAM
device on "Thru" Channel.
"Thru" Channel Column bus. 5-bit bus containing control and
address information for column accesses. Connects to right
RDRAM device on "Thru" Channel.
Clock To Master. Connects to left RDRAM device on "Thru"
Channel. Interface clock used for transmitting RSL signals to the
controller. Positive polarity.
A105
A106
A107
A108
A109
A110
A111
A112
A113
A114
A115
A116
Pin
CTMN_TERM_R
Gnd
DQA1_TERM
Gnd
DQA3_TERM
Gnd
DQA5_TERM
Gnd
DQA7_TERM
Gnd
CMD_TERM
Gnd
Pin Name
Version 1.0 January 2003
32 Bit RIMM
Description
B105
B106
B107
B108
B109
B110
B111
B112
B113
B114
B115
B116
Pin
DQA0_TERM
Gnd
DQA2_TERM
Gnd
DQA4_TERM
Gnd
DQA6_TERM
Gnd
DQA8_TERM
Gnd
SCK_TERM
Gnd
®
Pin Name
Module

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