AD9516-3 Analog Devices, AD9516-3 Datasheet - Page 26
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AD9516-3
Manufacturer Part Number
AD9516-3
Description
14-Output Clock Generator
Manufacturer
Analog Devices
Datasheet
1.AD9516-3.pdf
(84 pages)
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AD9516-3
DETAILED BLOCK DIAGRAM
REFIN (REF1)
REFIN (REF2)
BYPASS
RESET
SYNC
SCLK
SDIO
SDO
CLK
CLK
PD
CS
LF
REF1
REF2
REGULATOR (LDO)
LOW DROPOUT
VCO
AD9516-3
CONTROL
DIGITAL
SWITCHOVER
SERIAL
STATUS
LOGIC
REFERENCE
PORT
REF_ SEL
STATUS
VS
PRESCALER
2, 3, 4, 5, OR 6
1
P, P + 1
DIVIDE BY
GND
0
VCO STATUS
N DIVIDER
DIVIDER
R
COUNTERS
DISTRIBUTION
DIVIDE BY
DIVIDE BY
REFERENCE
1 TO 32
1 TO 32
Figure 41. Detailed Block Diagram
A/B
RSET
Rev. 0 | Page 26 of 84
DIVIDE BY
DIVIDE BY
DIVIDE BY
1 TO 32
1 TO 32
1 TO 32
PROGRAMMABLE
PROGRAMMABLE
R DELAY
N DELAY
REFMON
DIVIDE BY
DIVIDE BY
1 TO 32
1 TO 32
FREQUENCY
DETECTOR
DETECT
PHASE
LOCK
CPRSET VCP
ΔT
ΔT
ΔT
ΔT
CHARGE
PUMP
LVDS/CMOS
LVDS/CMOS
HOLD
LVPECL
LVPECL
LVPECL
OUT0
OUT0
OUT1
OUT1
OUT2
OUT2
OUT3
OUT3
OUT4
OUT4
OUT5
OUT5
OUT6 (OUT6A)
OUT6 (OUT6B)
OUT7 (OUT7A)
OUT7 (OUT7B)
OUT8 (OUT8A)
OUT8 (OUT8B)
OUT9 (OUT9A)
OUT9 (OUT9B)
LD
CP
STATUS