AD9849 Analog Devices, AD9849 Datasheet - Page 27

• Manufacturer Part Number: AD9849
• Description: CCD Signal Processors with Integrated Timing Driver
• Manufacturer: Analog Devices

PxGA GAIN
PxGA GAIN
PxGA GAIN
PxGA GAIN
REGISTER
REGISTER
REGISTER
REGISTER
FLD
FLD
FLD
FLD
HD
HD
HD
HD
VD
VD
VD
VD
NOTES
1. VD FALLING EDGE WILL RESET THE PxGA GAIN REGISTER STEERING TO "0101" LINE.
2. HD FALLING EDGES WILL ALTERNATE THE PxGA GAIN REGISTER STEERING BETWEEN "0101" AND "2323" LINES.
3. FLD STATUS IS IGNORED.
NOTES
1. FLD FALLING EDGE (START OF ODD FIELD) WILL RESET THE PxGA GAIN REGISTER STEERING TO "0101" LINE.
2. FLD RISING EDGE (START OF EVEN FIELD) WILL RESET THE PxGA GAIN REGISTER STEERING TO "2323" LINE.
3. HD FALLING EDGES WILL RESET THE PxGA GAIN REGISTER STEERING TO EITHER "0" (FLD = ODD) OR "2" (FLD = EVEN).
NOTES
1. VD FALLING EDGE WILL RESET THE PxGA GAIN REGISTER STEERING TO "0101" LINE.
2. HD FALLING EDGES WILL ALTERNATE THE PxGA GAIN REGISTER STEERING BETWEEN "0101" AND "1212" LINES.
3. ALL FIELDS WILL HAVE THE SAME PxGA GAIN STEERING PATTERN (FLD STATUS IS IGNORED).
NOTES
1. EACH LINE FOLLOWS "012012" STEERING PATTERN.
2. VD AND HD FALLING EDGES WILL RESET THE PxGA GAIN REGISTER STEERING TO "0".
3. FLD STATUS IS IGNORED.
X
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
0
0
0
2
1
1
1
0
2
0
1
0
ODD FIELD
ODD FIELD
ODD FIELD
ODD FIELD
3
1
2
1
2
0
1
2
3
1
2
0
0
0
0
0
1
1
1
1
0
0
0
2
1
1
1
0
0
2
0
0
1
1
1
3
0
2
0
2
1
3
1
0
2
2
1
0
EVEN FIELD
EVEN FIELD
EVEN FIELD
EVEN FIELD
3
3
2
1
2
2
1
2
3
3
2
0
0
2
0
0
AD9848/AD9849
1
3
1
1
0
2
0
2
1
3
1
0
0
0
0
0