MAX1845 Maxim, MAX1845 Datasheet - Page 20

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MAX1845

Manufacturer Part Number
MAX1845
Description
Dual / High-Efficiency / Step-Down Controller with Accurate Current Limit
Manufacturer
Maxim
Datasheet

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Dual, High-Efficiency, Step-Down
Controller with Accurate Current Limit
The input capacitor must meet the ripple current
requirement (I
Nontantalum chemistries (ceramic, aluminum, or OS-
CON) are preferred due to their resistance to power-up
surge currents:
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
(>5A) when using high-voltage (>20V) AC adapters.
Low-current applications usually require less attention.
For maximum efficiency, choose a high-side MOSFET
(Q1) that has conduction losses equal to the switching
losses at the optimum battery voltage (15V). Check to
ensure that the conduction losses at the minimum
input voltage do not exceed the package thermal limits
or violate the overall thermal budget. Check to ensure
that conduction losses plus switching losses at the
maximum input voltage do not exceed the package
ratings or violate the overall thermal budget.
Choose a low-side MOSFET (Q2) that has the lowest
possible R
age (i.e., SO-8), and is reasonably priced. Ensure that
the MAX1845 DL gate driver can drive Q2; in other
words, check that the gate is not pulled up by the high-
side switch turning on due to parasitic drain-to-gate
capacitance, causing cross-conduction problems.
Switching losses are not an issue for the low-side MOS-
FET since it is a zero-voltage switched device when
used in the buck topology.
Worst-case conduction losses occur at the duty cycle
extremes. For the high-side MOSFET, the worst-case-
power dissipation (PD) due to resistance occurs at min-
imum battery voltage:
Generally, a small high-side MOSFET is desired in
order to reduce switching losses at high input voltages.
However, the R
power-dissipation limits often limits how small the MOS-
FET can be. Again, the optimum occurs when the
switching (AC) losses equal the conduction (R
losses. High-side switching losses do not usually
20
PD(Q1 resistance)
______________________________________________________________________________________
I
DS(ON)
RMS
RMS
DS(ON)
=
, comes in a moderate to small pack-
) imposed by the switching currents.
I
LOAD
MOSFET Power Dissipation
=
Input Capacitor Selection
Power MOSFET Selection
required to stay within package
V
IN MIN
V
V
OUT
(
OUT IN
)
(
V - V
V
IN
I
LOAD
OUT
2
×
)
R
DS ON
DS(ON)
( )
)
become an issue until the input is greater than approxi-
mately 15V.
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied, due to the squared term in the
CV
chosen for adequate R
becomes extraordinarily hot when subjected to
V
Calculating the power dissipation in Q1 due to switch-
ing losses is difficult since it must allow for difficult
quantifying factors that influence the turn-on and turn-
off times. These factors include the internal gate resis-
tance, gate charge, threshold voltage, source
inductance, and PC board layout characteristics. The
following switching-loss calculation provides only a
very rough estimate and is no substitute for bench eval-
uation, preferably including a verification using a ther-
mocouple mounted on Q1:
where C
and I
(1A typ).
For the low-side MOSFET, Q2, the worst-case power
dissipation always occurs at maximum battery voltage:
The absolute worst case for MOSFET power dissipation
occurs under heavy overloads that are greater than
I
the current limit. To protect against this possibility,
“overdesign” the circuit to tolerate:
where I
allowed by the current-limit circuit, including threshold
tolerance and on-resistance variation. If short-circuit
protection without overload protection is adequate,
enable overvoltage protection, and use I
calculate component stresses.
Choose a Schottky diode (D1) having a forward voltage
low enough to prevent the Q2 MOSFET body diode
from turning on during the dead time. As a general rule,
a diode having a DC current rating equal to 1/3 of the
load current is sufficient. This diode is optional and can
be removed if efficiency is not critical.
LOAD(MAX)
IN(MAX)
2
PD(Q1 switching)
f switching loss equation. If the high-side MOSFET
PD(Q2)
GATE
I
LOAD
LIMIT(HIGH)
RSS
, reconsider the choice of MOSFET.
is the peak gate-drive source/sink current
= I
but are not quite high enough to exceed
is the reverse transfer capacitance of Q1,
=
LIMIT(HIGH)
1 -
V
is the maximum valley current
=
IN MAX
V
C
DS(ON)
OUT
(
RSS
+ (LIR / 2)
)
×
V
at low battery voltages
I
IN(MAX)
LOAD
I
GATE
2
I
LOAD(MAX)
2
×
× ×
LOAD(MAX)
R
f I
DS ON
LOAD
( )
to

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