WM8978 Wolfson Microelectronics Ltd., WM8978 Datasheet - Page 70

no-image

WM8978

Manufacturer Part Number
WM8978
Description
The WM8978 is a low power, high quality stereo codec designed for portable applications such as Digital still camera or Digital Camcorde
Manufacturer
Wolfson Microelectronics Ltd.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
WM8978CGEFL/RV
Manufacturer:
WOLFSON
Quantity:
10 000
Part Number:
WM8978G
Manufacturer:
SANYO
Quantity:
87 018
Company:
Part Number:
WM8978G
Manufacturer:
WM
Quantity:
115
Company:
Part Number:
WM8978GEFL,,7500,QFN32,WOLFSON,,,,16+
0
Part Number:
WM8978GEFL/RV
Manufacturer:
WOLFSON
Quantity:
9 870
Part Number:
WM8978GEFL/RV
Manufacturer:
WM
Quantity:
1 000
WM8978
w
Table 51 Companding Control
Table 52 8-bit Companded Word Composition
Companding involves using a piecewise linear approximation of the following equations (as set out
by ITU-T G.711 standard) for data compression:
F(x) = ln( 1 + |x|) / ln( 1 + )
A-law (where A=87.6 for Europe):
F(x) = A|x| / ( 1 + lnA)
F(x) = ( 1 + lnA|x|) / (1 + lnA)
The companded data is also inverted as recommended by the G.711 standard (all 8 bits are inverted
for -law, all even data bits are inverted for A-law). The data will be transmitted as the first 8 MSB’s
of data.
Companding converts 13 bits ( -law) or 12 bits (A-law) to 8 bits using non-linear quantization. The
input data range is separated into 8 levels, allowing low amplitude signals better precision than that
of high amplitude signals. This is to exploit the operation of the human auditory system, where
louder sounds do not require as much resolution as quieter sounds. The companded signal is an 8-
bit word containing sign (1-bit), exponent (3-bits) and mantissa (4-bits).
Setting the WL8 register bit allows the device to operate with 8-bit data. In this mode it is possible to
use 8 BCLK’s per LRC frame. When using DSP mode B, this allows 8-bit data words to be output
consecutively every 8 BCLK’s and can be used with 8-bit data words using the A-law and u-law
companding functions.
-law (where =255 for the U.S. and Japan):
R5
Companding
Control
SIGN
BIT7
REGISTER
ADDRESS
0
2:1
4:3
5
BIT
EXPONENT
BIT[6:4]
LOOPBACK
ADC_COMP
DAC_COMP
WL8
LABEL
-1
x
for x
for 1/A
1
0
0
0
0
DEFAULT
1/A
x
1
Digital loopback function
0=No loopback
1=Loopback enabled, ADC data output
is fed directly into DAC data input.
ADC companding
00=off (linear mode)
01=reserved
10=µ-law
11=A-law
DAC companding
00=off (linear mode)
01=reserved
10=µ-law
11=A-law
0=off
1=device operates in 8-bit mode
MANTISSA
BIT[3:0]
PTD Rev 2.6 November 2005
DESCRIPTION
Preliminary Technical Data
70