AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 135

• Manufacturer Part Number: AT94K05AL
• Description: Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
• Manufacturer: ATMEL Corporation

2-wire Serial Modes
Master
Transmitter Mode
Rev. 1138F–FPSLI–06/02
The 2-wire Serial Interface can operate in four different modes:
•
•
•
•
Data transfer in each mode of operation is shown in Figure 71 to Figure 74. These figures con-
tain the following abbreviations:
S: START condition
R: Read bit (High level at SDA)
W: Write bit (Low level at SDA)
A: Acknowledge bit (Low level at SDA)
A: Not acknowledge bit (High level at SDA)
Data: 8-bit data byte
P: STOP condition
In Figure 71 to Figure 74, circles are used to indicate that the 2-wire Serial Interrupt flag is set.
The numbers in the circles show the status code held in TWSR. At these points, an interrupt
routine must be executed to continue or complete the 2-wire Serial Transfer. The 2-wire Serial
Transfer is suspended until the 2-wire Serial Interrupt flag is cleared by software.
The 2-wire Serial Interrupt flag is not automatically cleared by the hardware when executing
the interrupt routine. Also note that the 2-wire Serial Interface starts execution as soon as this
bit is cleared, so that all access to TWAR, TWDR and TWSR must have been completed
before clearing this flag.
When the 2-wire Serial Interrupt flag is set, the status code in TWSR is used to determine the
appropriate software action. For each status code, the required software action and details of
the following serial transfer are given in Table 40 to Table 44.
In the Master Transmitter mode, a number of data bytes are transmitter to a Slave Receiver,
see Figure 71. Before the Master Transmitter mode can be entered, the TWCR must be initial-
ized as shown in Table 37.
Table 37. TWCR: Master Transmitter Mode Initialization
TWEN must be set to enable the 2-wire Serial Interface, TWSTA and TWSTO must be
cleared.
The Master Transmitter mode may now be entered by setting the TWSTA bit. The 2-wire
Serial Logic will now test the 2-wire Serial Bus and generate a START condition as soon as
the bus becomes free. When a START condition is transmitted, the 2-wire Serial Interrupt flag
(TWINT) is set by the hardware, and the status code in TWSR will be $08. TWDR must then
be loaded with the Slave address and the data direction bit (SLA+W). The TWINT flag must
then be cleared by software before the 2-wire Serial Transfer can continue. The TWINT flag is
cleared by writing a logic 1 to the flag.
When the Slave address and the direction bit have been transmitted and an acknowledgment
bit has been received, TWINT is set again and a number of status codes in TWSR are possi-
ble. Status codes $18, $20, or $38 apply to Master mode, and status codes $68, $78, or $B0
apply to Slave mode. The appropriate action to be taken for each of these status codes is
TWCR
value
Master Transmitter
Master Receiver
Slave Receiver
Slave Transmitter
TWINT
0
TWEA
X
TWSTA
0
TWSTO
0
AT94K Series FPSLIC
TWWC
0
TWEN
1
-
0
TWIE
X
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