AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 36

• Manufacturer Part Number: AT94K05AL
• Description: Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
• Manufacturer: ATMEL Corporation

Conditional Branch Summary
Complete Instruction Set Summary
Instruction Set Summary
36
Test
Rd > Rr
Rd ≥ Rr
Rd = Rr
Rd ≤ Rr
Rd < Rr
Rd > Rr
Rd ≥ Rr
Rd = Rr
Rd ≤ Rr
Rd < Rr
Carry
Negative
Overflow
Zero
Mnemonics
ADD
ADC
ADIW
SUB
SUBI
SBC
SBCI
SBIW
AND
ANDI
OR
ORI
EOR
COM
NEG
SBR
AT94K Series FPSLIC
Boolean
Z•(N ⊕ V) = 0
(N ⊕ V) = 0
Z = 1
(N ⊕ V) = 1
C + Z = 0
C = 0
Z = 1
C + Z = 1
C = 1
C = 1
N = 1
V = 1
Z = 1
Z+(N ⊕ V) = 1
Operands
Rd, Rr
Rd, Rr
Rd, K
Rd, Rr
Rd, K
Rd, Rr
Rd, K
Rd, K
Rd, Rr
Rd, K
Rd, Rr
Rd, K
Rd, Rr
Rd
Rd
Rd, K
Description
Add without Carry
Add with Carry
Add Immediate to Word
Subtract without Carry
Subtract Immediate
Subtract with Carry
Subtract Immediate with Carry
Subtract Immediate from Word
Logical AND
Logical AND with Immediate
Logical OR
Logical OR with Immediate
Exclusive OR
One’s Complement
Two’s Complement
Set Bit(s) in Register
Mnemonic
BRLT
BRGE
BREQ
BRGE
BRLT
BRLO
BRSH/BRCC
BREQ
BRSH
BRLO/BRCS
BRCS
BRMI
BRVS
BREQ
Arithmetic and Logic Instructions
Complementary
Rd ≤ Rr
Rd < Rr
Rd ≠ Rr
Rd > Rr
Rd ≥ Rr
Rd ≤ Rr
Rd < Rr
Rd ≠ Rr
Rd > Rr
Rd ≥ Rr
No Carry
Positive
No Overflow
Not Zero
Operation
Rd ← Rd + Rr
Rd ← Rd + Rr + C
Rd+1:Rd ← Rd+1:Rd + K
Rd ← Rd - Rr
Rd ← Rd - K
Rd ← Rd - Rr - C
Rd ← Rd - K - C
Rd+1:Rd ← Rd+1:Rd - K
Rd ← Rd • Rr
Rd ← Rd • K
Rd ← Rd v Rr
Rd ← Rd v K
Rd ← Rd ⊕ Rr
Rd ← $FF - Rd
Rd ← $00 - Rd
Rd ← Rd v K
Boolean
Z+(N ⊕ V) = 1
(N ⊕ V) = 1
Z = 0
Z•(N ⊕ V) = 0
(N ⊕ V) = 0
C + Z = 1
C = 1
Z = 0
C + Z = 0
C = 0
C = 0
N = 0
V = 0
Z = 0
Mnemonic
BRGE
BRLT
BRNE
BRLT
BRGE
BRSH
BRNE
BRLO
BRSH/BRCC
BRCC
BRPL
BRVC
BRNE
BRLO/BRCS
Flags
Z,C,N,V,S,H
Z,C,N,V,S,H
Z,C,N,V,S
Z,C,N,V,S,H
Z,C,N,V,S,H
Z,C,N,V,S,H
Z,C,N,V,S,H
Z,C,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,C,N,V,S
Z,C,N,V,S,H
Z,N,V,S
Rev. 1138F–FPSLI–06/02
Comment
Signed
Signed
Signed
Signed
Signed
Unsigned
Unsigned
Unsigned
Unsigned
Unsigned
Simple
Simple
Simple
Simple
#Clock
1
1
2
1
1
1
1
2
1
1
1
1
1
1
1
1