AT94K05AL ATMEL Corporation, AT94K05AL Datasheet - Page 60

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AT94K05AL

Manufacturer Part Number
AT94K05AL
Description
Fpslic Devices Combine 5K Gates of Atmel's Patented AT40K Fpga Architecture, a 20 Mips Avr 8-bit Risc Microprocessor Core, Numerous Fixed Microcontroller Peripheries And up to 36K Bytes of Program And Data SRAM.
Manufacturer
ATMEL Corporation
Datasheet

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60
AT94K Series FPSLIC
The most typical program setup for the Reset and Interrupt Vector Addresses are:
Note:
Address
$0000
$0002
$0004
$0006
$0008
$000A
$000C
$000E
$0010
$0012
$0014
$0016
$0018
$001A
$001C
$001E
$0020
$0022
$0024
$0026
$0028
$002A
$002C
$002E
$0030
$0032
$0034
$0036
$0038
$003A
$003C
$003E
$0040
$0042
$0044
$0046
;
RESET:
$0048
$0049
$004A
$004B
$004C
...
1. Not Available on AT94K05. However, the vector jump table positions must be maintained for
appropriate UART and 2-wire serial interrupt jumps.
Labels
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
ldi
out
ldi
out
<instr>
...
Code
RESET
FPGA_INT0
EXT_INT0
FPGA_INT1
EXT_INT1
FPGA_INT2
EXT_INT2
FPGA_INT3
EXT_INT3
TIM2_COMP
TIM2_OVF
TIM1_CAPT
TIM1_COMPA
TIM1_COMPB
TIM1_OVF
TIM0_COMP
TIM0_OVF
FPGA_INT4
FPGA_INT5
FPGA_INT6
FPGA_INT7
UART0_RXC
UART0_DRE
UART0_TXC
FPGA_INT8
FPGA_INT9
FPGA_INT10
FPGA_INT11
UART1_RXC
UART1_DRE
UART1_TXC
FPGA_INT12
FPGA_INT13
FPGA_INT14
FPGA_INT15
TWS_INT
r16,high(RAMEND)
SPH,r16
r16,low(RAMEND)
SPL,r16
xxx
...
Comments
Reset Handle: Program Execution Starts Here
; FPGA Interrupt0 Handle
; External Interrupt0 Handle
; FPGA Interrupt1 Handle
; External Interrupt1 Handle
; FPGA Interrupt2 Handle
; External Interrupt2 Handle
; FPGA Interrupt3 Handle
; External Interrupt3 Handle
; Timer/Counter2 Compare Match Interrupt Handle
; Timer/Counter2 Overflow Interrupt Handle
; Timer/Counter1 Capture Event Interrupt Handle
; Timer/Counter1 Compare Match A Interrupt Handle
; Timer/Counter1 Compare Match B Interrupt Handle
; Timer/Counter1 Overflow Interrupt Handle
; Timer/Counter0 Compare Match Interrupt Handle
; Timer/Counter0 Overflow Interrupt Handle
; FPGA Interrupt4 Handle
; FPGA Interrupt5 Handle
; FPGA Interrupt6 Handle
; FPGA Interrupt7 Handle
; UART0 Receive Complete Interrupt Handle
; UART0 Data Register Empty Interrupt Handle
; UART0 Transmit Complete Interrupt Handle
; FPGA Interrupt8 Handle
; FPGA Interrupt9 Handle
; FPGA Interrupt10 Handle
; FPGA Interrupt11 Handle
; UART1 Receive Complete Interrupt Handle
; UART1 Data Register Empty Interrupt Handle
; UART1 Transmit Complete Interrupt Handle
; FPGA Interrupt12 Handle
; FPGA Interrupt13 Handle
; FPGA Interrupt14 Handle
; FPGA Interrupt15 Handle
; 2-wire Serial Interrupt
; Main program start
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Rev. 1138F–FPSLI–06/02

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